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@@ -469,6 +469,7 @@ struct azx {
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unsigned int irq_pending_warned :1;
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unsigned int probing :1; /* codec probing phase */
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unsigned int snoop:1;
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+ unsigned int align_buffer_size:1;
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/* for debugging */
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unsigned int last_cmd[AZX_MAX_CODECS];
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@@ -1690,7 +1691,7 @@ static int azx_pcm_open(struct snd_pcm_substream *substream)
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runtime->hw.rates = hinfo->rates;
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snd_pcm_limit_hw_rates(runtime);
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snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
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- if (align_buffer_size)
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+ if (chip->align_buffer_size)
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/* constrain buffer sizes to be multiple of 128
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bytes. This is more efficient in terms of memory
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access but isn't required by the HDA spec and
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@@ -2773,8 +2774,9 @@ static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci,
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}
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/* disable buffer size rounding to 128-byte multiples if supported */
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+ chip->align_buffer_size = align_buffer_size;
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if (chip->driver_caps & AZX_DCAPS_BUFSIZE)
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- align_buffer_size = 0;
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+ chip->align_buffer_size = 0;
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/* allow 64bit DMA address if supported by H/W */
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if ((gcap & ICH6_GCAP_64OK) && !pci_set_dma_mask(pci, DMA_BIT_MASK(64)))
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