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@@ -1,7 +1,7 @@
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/*
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* Port on Texas Instruments TMS320C6x architecture
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*
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- * Copyright (C) 2005, 2006, 2009, 2010 Texas Instruments Incorporated
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+ * Copyright (C) 2005, 2006, 2009, 2010, 2012 Texas Instruments Incorporated
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* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
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*
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* This program is free software; you can redistribute it and/or modify
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@@ -16,9 +16,14 @@
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/*
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* Cache line size
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*/
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-#define L1D_CACHE_BYTES 64
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-#define L1P_CACHE_BYTES 32
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-#define L2_CACHE_BYTES 128
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+#define L1D_CACHE_SHIFT 6
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+#define L1D_CACHE_BYTES (1 << L1D_CACHE_SHIFT)
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+
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+#define L1P_CACHE_SHIFT 5
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+#define L1P_CACHE_BYTES (1 << L1P_CACHE_SHIFT)
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+
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+#define L2_CACHE_SHIFT 7
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+#define L2_CACHE_BYTES (1 << L2_CACHE_SHIFT)
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/*
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* L2 used as cache
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@@ -29,7 +34,8 @@
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* For practical reasons the L1_CACHE_BYTES defines should not be smaller than
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* the L2 line size
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*/
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-#define L1_CACHE_BYTES L2_CACHE_BYTES
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+#define L1_CACHE_SHIFT L2_CACHE_SHIFT
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+#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
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#define L2_CACHE_ALIGN_LOW(x) \
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(((x) & ~(L2_CACHE_BYTES - 1)))
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