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@@ -271,11 +271,6 @@ enum ath5k_driver_mode {
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/* adding this flag to rate_code enables short preamble, see ar5212_reg.h */
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#define AR5K_SET_SHORT_PREAMBLE 0x04
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-#define HAS_SHPREAMBLE(_ix) \
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- (rt->rates[_ix].modulation == IEEE80211_RATE_SHORT_PREAMBLE)
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-#define SHPREAMBLE_FLAG(_ix) \
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- (HAS_SHPREAMBLE(_ix) ? AR5K_SET_SHORT_PREAMBLE : 0)
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-
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/****************\
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TX DEFINITIONS
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@@ -568,152 +563,61 @@ struct ath5k_athchan_2ghz {
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u16 a2_athchan;
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};
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+
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/*
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* Rate definitions
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- * TODO: Clean them up or move them on mac80211 -most of these infos are
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- * used by the rate control algorytm on MadWiFi.
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*/
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-/* Max number of rates on the rate table and what it seems
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- * Atheros hardware supports */
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-#define AR5K_MAX_RATES 32
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-
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/**
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- * struct ath5k_rate - rate structure
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- * @valid: is this a valid rate for rate control (remove)
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- * @modulation: respective mac80211 modulation
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- * @rate_kbps: rate in kbit/s
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- * @rate_code: hardware rate value, used in &struct ath5k_desc, on RX on
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- * &struct ath5k_rx_status.rs_rate and on TX on
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- * &struct ath5k_tx_status.ts_rate. Seems the ar5xxx harware supports
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- * up to 32 rates, indexed by 1-32. This means we really only need
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- * 6 bits for the rate_code.
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- * @dot11_rate: respective IEEE-802.11 rate value
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- * @control_rate: index of rate assumed to be used to send control frames.
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- * This can be used to set override the value on the rate duration
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- * registers. This is only useful if we can override in the harware at
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- * what rate we want to send control frames at. Note that IEEE-802.11
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- * Ch. 9.6 (after IEEE 802.11g changes) defines the rate at which we
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- * should send ACK/CTS, if we change this value we can be breaking
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- * the spec.
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+ * Seems the ar5xxx harware supports up to 32 rates, indexed by 1-32.
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*
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- * This structure is used to get the RX rate or set the TX rate on the
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+ * The rate code is used to get the RX rate or set the TX rate on the
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* hardware descriptors. It is also used for internal modulation control
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* and settings.
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*
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- * On RX after the &struct ath5k_desc is parsed by the appropriate
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- * ah_proc_rx_desc() the respective hardware rate value is set in
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- * &struct ath5k_rx_status.rs_rate. On TX the desired rate is set in
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- * &struct ath5k_tx_status.ts_rate which is later used to setup the
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- * &struct ath5k_desc correctly. This is the hardware rate map we are
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- * aware of:
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+ * This is the hardware rate map we are aware of:
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*
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- * rate_code 1 2 3 4 5 6 7 8
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+ * rate_code 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08
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* rate_kbps 3000 1000 ? ? ? 2000 500 48000
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*
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- * rate_code 9 10 11 12 13 14 15 16
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+ * rate_code 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10
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* rate_kbps 24000 12000 6000 54000 36000 18000 9000 ?
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*
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* rate_code 17 18 19 20 21 22 23 24
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* rate_kbps ? ? ? ? ? ? ? 11000
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*
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* rate_code 25 26 27 28 29 30 31 32
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- * rate_kbps 5500 2000 1000 ? ? ? ? ?
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+ * rate_kbps 5500 2000 1000 11000S 5500S 2000S ? ?
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*
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+ * "S" indicates CCK rates with short preamble.
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+ *
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+ * AR5211 has different rate codes for CCK (802.11B) rates. It only uses the
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+ * lowest 4 bits, so they are the same as below with a 0xF mask.
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+ * (0xB, 0xA, 0x9 and 0x8 for 1M, 2M, 5.5M and 11M).
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+ * We handle this in ath5k_setup_bands().
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*/
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-struct ath5k_rate {
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- u8 valid;
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- u32 modulation;
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- u16 rate_kbps;
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- u8 rate_code;
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- u8 dot11_rate;
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- u8 control_rate;
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-};
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-
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-/* XXX: GRR all this stuff to get leds blinking ??? (check out setcurmode) */
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-struct ath5k_rate_table {
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- u16 rate_count;
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- u8 rate_code_to_index[AR5K_MAX_RATES]; /* Back-mapping */
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- struct ath5k_rate rates[AR5K_MAX_RATES];
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-};
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-
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-/*
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- * Rate tables...
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- * TODO: CLEAN THIS !!!
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- */
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-#define AR5K_RATES_11A { 8, { \
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- 255, 255, 255, 255, 255, 255, 255, 255, 6, 4, 2, 0, \
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- 7, 5, 3, 1, 255, 255, 255, 255, 255, 255, 255, 255, \
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- 255, 255, 255, 255, 255, 255, 255, 255 }, { \
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- { 1, 0, 6000, 11, 140, 0 }, \
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- { 1, 0, 9000, 15, 18, 0 }, \
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- { 1, 0, 12000, 10, 152, 2 }, \
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- { 1, 0, 18000, 14, 36, 2 }, \
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- { 1, 0, 24000, 9, 176, 4 }, \
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- { 1, 0, 36000, 13, 72, 4 }, \
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- { 1, 0, 48000, 8, 96, 4 }, \
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- { 1, 0, 54000, 12, 108, 4 } } \
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-}
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-
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-#define AR5K_RATES_11B { 4, { \
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- 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, \
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- 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, \
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- 3, 2, 1, 0, 255, 255, 255, 255 }, { \
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- { 1, 0, 1000, 27, 130, 0 }, \
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- { 1, IEEE80211_RATE_SHORT_PREAMBLE, 2000, 26, 132, 1 }, \
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- { 1, IEEE80211_RATE_SHORT_PREAMBLE, 5500, 25, 139, 1 }, \
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- { 1, IEEE80211_RATE_SHORT_PREAMBLE, 11000, 24, 150, 1 } } \
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-}
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-
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-#define AR5K_RATES_11G { 12, { \
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- 255, 255, 255, 255, 255, 255, 255, 255, 10, 8, 6, 4, \
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- 11, 9, 7, 5, 255, 255, 255, 255, 255, 255, 255, 255, \
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- 3, 2, 1, 0, 255, 255, 255, 255 }, { \
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- { 1, 0, 1000, 27, 2, 0 }, \
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- { 1, IEEE80211_RATE_SHORT_PREAMBLE, 2000, 26, 4, 1 }, \
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- { 1, IEEE80211_RATE_SHORT_PREAMBLE, 5500, 25, 11, 1 }, \
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- { 1, IEEE80211_RATE_SHORT_PREAMBLE, 11000, 24, 22, 1 }, \
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- { 0, 0, 6000, 11, 12, 4 }, \
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- { 0, 0, 9000, 15, 18, 4 }, \
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- { 1, 0, 12000, 10, 24, 6 }, \
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- { 1, 0, 18000, 14, 36, 6 }, \
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- { 1, 0, 24000, 9, 48, 8 }, \
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- { 1, 0, 36000, 13, 72, 8 }, \
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- { 1, 0, 48000, 8, 96, 8 }, \
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- { 1, 0, 54000, 12, 108, 8 } } \
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-}
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+#define AR5K_MAX_RATES 32
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-#define AR5K_RATES_TURBO { 8, { \
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- 255, 255, 255, 255, 255, 255, 255, 255, 6, 4, 2, 0, \
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- 7, 5, 3, 1, 255, 255, 255, 255, 255, 255, 255, 255, \
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- 255, 255, 255, 255, 255, 255, 255, 255 }, { \
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- { 1, MODULATION_TURBO, 6000, 11, 140, 0 }, \
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- { 1, MODULATION_TURBO, 9000, 15, 18, 0 }, \
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- { 1, MODULATION_TURBO, 12000, 10, 152, 2 }, \
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- { 1, MODULATION_TURBO, 18000, 14, 36, 2 }, \
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- { 1, MODULATION_TURBO, 24000, 9, 176, 4 }, \
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- { 1, MODULATION_TURBO, 36000, 13, 72, 4 }, \
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- { 1, MODULATION_TURBO, 48000, 8, 96, 4 }, \
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- { 1, MODULATION_TURBO, 54000, 12, 108, 4 } } \
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-}
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+/* B */
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+#define ATH5K_RATE_CODE_1M 0x1B
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+#define ATH5K_RATE_CODE_2M 0x1A
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+#define ATH5K_RATE_CODE_5_5M 0x19
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+#define ATH5K_RATE_CODE_11M 0x18
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+/* A and G */
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+#define ATH5K_RATE_CODE_6M 0x0B
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+#define ATH5K_RATE_CODE_9M 0x0F
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+#define ATH5K_RATE_CODE_12M 0x0A
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+#define ATH5K_RATE_CODE_18M 0x0E
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+#define ATH5K_RATE_CODE_24M 0x09
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+#define ATH5K_RATE_CODE_36M 0x0D
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+#define ATH5K_RATE_CODE_48M 0x08
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+#define ATH5K_RATE_CODE_54M 0x0C
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+/* XR */
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+#define ATH5K_RATE_CODE_XR_500K 0x07
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+#define ATH5K_RATE_CODE_XR_1M 0x02
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+#define ATH5K_RATE_CODE_XR_2M 0x06
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+#define ATH5K_RATE_CODE_XR_3M 0x01
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-#define AR5K_RATES_XR { 12, { \
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- 255, 3, 1, 255, 255, 255, 2, 0, 10, 8, 6, 4, \
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- 11, 9, 7, 5, 255, 255, 255, 255, 255, 255, 255, 255, \
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- 255, 255, 255, 255, 255, 255, 255, 255 }, { \
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- { 1, MODULATION_XR, 500, 7, 129, 0 }, \
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- { 1, MODULATION_XR, 1000, 2, 139, 1 }, \
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- { 1, MODULATION_XR, 2000, 6, 150, 2 }, \
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- { 1, MODULATION_XR, 3000, 1, 150, 3 }, \
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- { 1, 0, 6000, 11, 140, 4 }, \
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- { 1, 0, 9000, 15, 18, 4 }, \
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- { 1, 0, 12000, 10, 152, 6 }, \
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- { 1, 0, 18000, 14, 36, 6 }, \
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- { 1, 0, 24000, 9, 176, 8 }, \
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- { 1, 0, 36000, 13, 72, 8 }, \
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- { 1, 0, 48000, 8, 96, 8 }, \
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- { 1, 0, 54000, 12, 108, 8 } } \
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-}
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/*
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* Crypto definitions
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