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@@ -1,5 +1,5 @@
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/*
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- * s5m-irq.c
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+ * sec-irq.c
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd
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* http://www.samsung.com
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@@ -16,12 +16,12 @@
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#include <linux/irq.h>
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#include <linux/mfd/samsung/s5m-core.h>
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-struct s5m_irq_data {
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+struct sec_irq_data {
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int reg;
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int mask;
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};
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-static struct s5m_irq_data s5m8767_irqs[] = {
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+static struct sec_irq_data s5m8767_irqs[] = {
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[S5M8767_IRQ_PWRR] = {
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.reg = 1,
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.mask = S5M8767_IRQ_PWRR_MASK,
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@@ -92,7 +92,7 @@ static struct s5m_irq_data s5m8767_irqs[] = {
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},
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};
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-static struct s5m_irq_data s5m8763_irqs[] = {
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+static struct sec_irq_data s5m8763_irqs[] = {
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[S5M8763_IRQ_DCINF] = {
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.reg = 1,
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.mask = S5M8763_IRQ_DCINF_MASK,
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@@ -167,51 +167,51 @@ static struct s5m_irq_data s5m8763_irqs[] = {
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},
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};
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-static inline struct s5m_irq_data *
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-irq_to_s5m8767_irq(struct s5m87xx_dev *s5m87xx, int irq)
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+static inline struct sec_irq_data *
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+irq_to_s5m8767_irq(struct sec_pmic_dev *sec_pmic, int irq)
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{
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- return &s5m8767_irqs[irq - s5m87xx->irq_base];
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+ return &s5m8767_irqs[irq - sec_pmic->irq_base];
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}
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static void s5m8767_irq_lock(struct irq_data *data)
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{
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- struct s5m87xx_dev *s5m87xx = irq_data_get_irq_chip_data(data);
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+ struct sec_pmic_dev *sec_pmic = irq_data_get_irq_chip_data(data);
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- mutex_lock(&s5m87xx->irqlock);
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+ mutex_lock(&sec_pmic->irqlock);
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}
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static void s5m8767_irq_sync_unlock(struct irq_data *data)
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{
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- struct s5m87xx_dev *s5m87xx = irq_data_get_irq_chip_data(data);
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+ struct sec_pmic_dev *sec_pmic = irq_data_get_irq_chip_data(data);
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int i;
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- for (i = 0; i < ARRAY_SIZE(s5m87xx->irq_masks_cur); i++) {
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- if (s5m87xx->irq_masks_cur[i] != s5m87xx->irq_masks_cache[i]) {
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- s5m87xx->irq_masks_cache[i] = s5m87xx->irq_masks_cur[i];
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- s5m_reg_write(s5m87xx, S5M8767_REG_INT1M + i,
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- s5m87xx->irq_masks_cur[i]);
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+ for (i = 0; i < ARRAY_SIZE(sec_pmic->irq_masks_cur); i++) {
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+ if (sec_pmic->irq_masks_cur[i] != sec_pmic->irq_masks_cache[i]) {
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+ sec_pmic->irq_masks_cache[i] = sec_pmic->irq_masks_cur[i];
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+ sec_reg_write(sec_pmic, S5M8767_REG_INT1M + i,
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+ sec_pmic->irq_masks_cur[i]);
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}
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}
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- mutex_unlock(&s5m87xx->irqlock);
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+ mutex_unlock(&sec_pmic->irqlock);
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}
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static void s5m8767_irq_unmask(struct irq_data *data)
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{
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- struct s5m87xx_dev *s5m87xx = irq_data_get_irq_chip_data(data);
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- struct s5m_irq_data *irq_data = irq_to_s5m8767_irq(s5m87xx,
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+ struct sec_pmic_dev *sec_pmic = irq_data_get_irq_chip_data(data);
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+ struct sec_irq_data *irq_data = irq_to_s5m8767_irq(sec_pmic,
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data->irq);
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- s5m87xx->irq_masks_cur[irq_data->reg - 1] &= ~irq_data->mask;
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+ sec_pmic->irq_masks_cur[irq_data->reg - 1] &= ~irq_data->mask;
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}
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static void s5m8767_irq_mask(struct irq_data *data)
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{
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- struct s5m87xx_dev *s5m87xx = irq_data_get_irq_chip_data(data);
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- struct s5m_irq_data *irq_data = irq_to_s5m8767_irq(s5m87xx,
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+ struct sec_pmic_dev *sec_pmic = irq_data_get_irq_chip_data(data);
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+ struct sec_irq_data *irq_data = irq_to_s5m8767_irq(sec_pmic,
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data->irq);
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- s5m87xx->irq_masks_cur[irq_data->reg - 1] |= irq_data->mask;
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+ sec_pmic->irq_masks_cur[irq_data->reg - 1] |= irq_data->mask;
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}
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static struct irq_chip s5m8767_irq_chip = {
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@@ -222,51 +222,51 @@ static struct irq_chip s5m8767_irq_chip = {
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.irq_unmask = s5m8767_irq_unmask,
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};
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-static inline struct s5m_irq_data *
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-irq_to_s5m8763_irq(struct s5m87xx_dev *s5m87xx, int irq)
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+static inline struct sec_irq_data *
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+irq_to_s5m8763_irq(struct sec_pmic_dev *sec_pmic, int irq)
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{
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- return &s5m8763_irqs[irq - s5m87xx->irq_base];
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+ return &s5m8763_irqs[irq - sec_pmic->irq_base];
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}
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static void s5m8763_irq_lock(struct irq_data *data)
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{
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- struct s5m87xx_dev *s5m87xx = irq_data_get_irq_chip_data(data);
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+ struct sec_pmic_dev *sec_pmic = irq_data_get_irq_chip_data(data);
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- mutex_lock(&s5m87xx->irqlock);
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+ mutex_lock(&sec_pmic->irqlock);
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}
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static void s5m8763_irq_sync_unlock(struct irq_data *data)
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{
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- struct s5m87xx_dev *s5m87xx = irq_data_get_irq_chip_data(data);
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+ struct sec_pmic_dev *sec_pmic = irq_data_get_irq_chip_data(data);
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int i;
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- for (i = 0; i < ARRAY_SIZE(s5m87xx->irq_masks_cur); i++) {
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- if (s5m87xx->irq_masks_cur[i] != s5m87xx->irq_masks_cache[i]) {
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- s5m87xx->irq_masks_cache[i] = s5m87xx->irq_masks_cur[i];
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- s5m_reg_write(s5m87xx, S5M8763_REG_IRQM1 + i,
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- s5m87xx->irq_masks_cur[i]);
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+ for (i = 0; i < ARRAY_SIZE(sec_pmic->irq_masks_cur); i++) {
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+ if (sec_pmic->irq_masks_cur[i] != sec_pmic->irq_masks_cache[i]) {
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+ sec_pmic->irq_masks_cache[i] = sec_pmic->irq_masks_cur[i];
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+ sec_reg_write(sec_pmic, S5M8763_REG_IRQM1 + i,
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+ sec_pmic->irq_masks_cur[i]);
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}
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}
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- mutex_unlock(&s5m87xx->irqlock);
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+ mutex_unlock(&sec_pmic->irqlock);
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}
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static void s5m8763_irq_unmask(struct irq_data *data)
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{
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- struct s5m87xx_dev *s5m87xx = irq_data_get_irq_chip_data(data);
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- struct s5m_irq_data *irq_data = irq_to_s5m8763_irq(s5m87xx,
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+ struct sec_pmic_dev *sec_pmic = irq_data_get_irq_chip_data(data);
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+ struct sec_irq_data *irq_data = irq_to_s5m8763_irq(sec_pmic,
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data->irq);
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- s5m87xx->irq_masks_cur[irq_data->reg - 1] &= ~irq_data->mask;
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+ sec_pmic->irq_masks_cur[irq_data->reg - 1] &= ~irq_data->mask;
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}
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static void s5m8763_irq_mask(struct irq_data *data)
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{
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- struct s5m87xx_dev *s5m87xx = irq_data_get_irq_chip_data(data);
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- struct s5m_irq_data *irq_data = irq_to_s5m8763_irq(s5m87xx,
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+ struct sec_pmic_dev *sec_pmic = irq_data_get_irq_chip_data(data);
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+ struct sec_irq_data *irq_data = irq_to_s5m8763_irq(sec_pmic,
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data->irq);
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- s5m87xx->irq_masks_cur[irq_data->reg - 1] |= irq_data->mask;
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+ sec_pmic->irq_masks_cur[irq_data->reg - 1] |= irq_data->mask;
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}
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static struct irq_chip s5m8763_irq_chip = {
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@@ -280,26 +280,26 @@ static struct irq_chip s5m8763_irq_chip = {
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static irqreturn_t s5m8767_irq_thread(int irq, void *data)
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{
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- struct s5m87xx_dev *s5m87xx = data;
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+ struct sec_pmic_dev *sec_pmic = data;
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u8 irq_reg[NUM_IRQ_REGS-1];
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int ret;
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int i;
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- ret = s5m_bulk_read(s5m87xx, S5M8767_REG_INT1,
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+ ret = sec_bulk_read(sec_pmic, S5M8767_REG_INT1,
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NUM_IRQ_REGS - 1, irq_reg);
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if (ret < 0) {
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- dev_err(s5m87xx->dev, "Failed to read interrupt register: %d\n",
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+ dev_err(sec_pmic->dev, "Failed to read interrupt register: %d\n",
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ret);
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return IRQ_NONE;
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}
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for (i = 0; i < NUM_IRQ_REGS - 1; i++)
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- irq_reg[i] &= ~s5m87xx->irq_masks_cur[i];
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+ irq_reg[i] &= ~sec_pmic->irq_masks_cur[i];
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for (i = 0; i < S5M8767_IRQ_NR; i++) {
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if (irq_reg[s5m8767_irqs[i].reg - 1] & s5m8767_irqs[i].mask)
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- handle_nested_irq(s5m87xx->irq_base + i);
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+ handle_nested_irq(sec_pmic->irq_base + i);
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}
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return IRQ_HANDLED;
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@@ -307,44 +307,44 @@ static irqreturn_t s5m8767_irq_thread(int irq, void *data)
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static irqreturn_t s5m8763_irq_thread(int irq, void *data)
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{
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- struct s5m87xx_dev *s5m87xx = data;
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+ struct sec_pmic_dev *sec_pmic = data;
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u8 irq_reg[NUM_IRQ_REGS];
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int ret;
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int i;
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- ret = s5m_bulk_read(s5m87xx, S5M8763_REG_IRQ1,
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+ ret = sec_bulk_read(sec_pmic, S5M8763_REG_IRQ1,
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NUM_IRQ_REGS, irq_reg);
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if (ret < 0) {
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- dev_err(s5m87xx->dev, "Failed to read interrupt register: %d\n",
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+ dev_err(sec_pmic->dev, "Failed to read interrupt register: %d\n",
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ret);
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return IRQ_NONE;
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}
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for (i = 0; i < NUM_IRQ_REGS; i++)
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- irq_reg[i] &= ~s5m87xx->irq_masks_cur[i];
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+ irq_reg[i] &= ~sec_pmic->irq_masks_cur[i];
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for (i = 0; i < S5M8763_IRQ_NR; i++) {
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if (irq_reg[s5m8763_irqs[i].reg - 1] & s5m8763_irqs[i].mask)
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- handle_nested_irq(s5m87xx->irq_base + i);
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+ handle_nested_irq(sec_pmic->irq_base + i);
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}
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return IRQ_HANDLED;
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}
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-int s5m_irq_resume(struct s5m87xx_dev *s5m87xx)
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+int sec_irq_resume(struct sec_pmic_dev *sec_pmic)
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{
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- if (s5m87xx->irq && s5m87xx->irq_base) {
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- switch (s5m87xx->device_type) {
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+ if (sec_pmic->irq && sec_pmic->irq_base) {
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+ switch (sec_pmic->device_type) {
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case S5M8763X:
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- s5m8763_irq_thread(s5m87xx->irq_base, s5m87xx);
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+ s5m8763_irq_thread(sec_pmic->irq_base, sec_pmic);
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break;
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case S5M8767X:
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- s5m8767_irq_thread(s5m87xx->irq_base, s5m87xx);
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+ s5m8767_irq_thread(sec_pmic->irq_base, sec_pmic);
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break;
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default:
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- dev_err(s5m87xx->dev,
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+ dev_err(sec_pmic->dev,
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"Unknown device type %d\n",
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- s5m87xx->device_type);
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+ sec_pmic->device_type);
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return -EINVAL;
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}
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@@ -352,43 +352,43 @@ int s5m_irq_resume(struct s5m87xx_dev *s5m87xx)
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return 0;
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}
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-int s5m_irq_init(struct s5m87xx_dev *s5m87xx)
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+int sec_irq_init(struct sec_pmic_dev *sec_pmic)
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{
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int i;
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int cur_irq;
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int ret = 0;
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- int type = s5m87xx->device_type;
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+ int type = sec_pmic->device_type;
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- if (!s5m87xx->irq) {
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- dev_warn(s5m87xx->dev,
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+ if (!sec_pmic->irq) {
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+ dev_warn(sec_pmic->dev,
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"No interrupt specified, no interrupts\n");
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- s5m87xx->irq_base = 0;
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+ sec_pmic->irq_base = 0;
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return 0;
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}
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- if (!s5m87xx->irq_base) {
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- dev_err(s5m87xx->dev,
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+ if (!sec_pmic->irq_base) {
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+ dev_err(sec_pmic->dev,
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"No interrupt base specified, no interrupts\n");
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return 0;
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}
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- mutex_init(&s5m87xx->irqlock);
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+ mutex_init(&sec_pmic->irqlock);
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switch (type) {
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case S5M8763X:
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for (i = 0; i < NUM_IRQ_REGS; i++) {
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- s5m87xx->irq_masks_cur[i] = 0xff;
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- s5m87xx->irq_masks_cache[i] = 0xff;
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- s5m_reg_write(s5m87xx, S5M8763_REG_IRQM1 + i,
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+ sec_pmic->irq_masks_cur[i] = 0xff;
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+ sec_pmic->irq_masks_cache[i] = 0xff;
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+ sec_reg_write(sec_pmic, S5M8763_REG_IRQM1 + i,
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0xff);
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}
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- s5m_reg_write(s5m87xx, S5M8763_REG_STATUSM1, 0xff);
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- s5m_reg_write(s5m87xx, S5M8763_REG_STATUSM2, 0xff);
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+ sec_reg_write(sec_pmic, S5M8763_REG_STATUSM1, 0xff);
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+ sec_reg_write(sec_pmic, S5M8763_REG_STATUSM2, 0xff);
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for (i = 0; i < S5M8763_IRQ_NR; i++) {
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- cur_irq = i + s5m87xx->irq_base;
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- irq_set_chip_data(cur_irq, s5m87xx);
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+ cur_irq = i + sec_pmic->irq_base;
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+ irq_set_chip_data(cur_irq, sec_pmic);
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irq_set_chip_and_handler(cur_irq, &s5m8763_irq_chip,
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handle_edge_irq);
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irq_set_nested_thread(cur_irq, 1);
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@@ -399,30 +399,30 @@ int s5m_irq_init(struct s5m87xx_dev *s5m87xx)
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#endif
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}
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- ret = request_threaded_irq(s5m87xx->irq, NULL,
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+ ret = request_threaded_irq(sec_pmic->irq, NULL,
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s5m8763_irq_thread,
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IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
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- "s5m87xx-irq", s5m87xx);
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+ "sec-pmic-irq", sec_pmic);
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if (ret) {
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- dev_err(s5m87xx->dev, "Failed to request IRQ %d: %d\n",
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- s5m87xx->irq, ret);
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+ dev_err(sec_pmic->dev, "Failed to request IRQ %d: %d\n",
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+ sec_pmic->irq, ret);
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return ret;
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}
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break;
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case S5M8767X:
|
|
|
for (i = 0; i < NUM_IRQ_REGS - 1; i++) {
|
|
|
- s5m87xx->irq_masks_cur[i] = 0xff;
|
|
|
- s5m87xx->irq_masks_cache[i] = 0xff;
|
|
|
- s5m_reg_write(s5m87xx, S5M8767_REG_INT1M + i,
|
|
|
+ sec_pmic->irq_masks_cur[i] = 0xff;
|
|
|
+ sec_pmic->irq_masks_cache[i] = 0xff;
|
|
|
+ sec_reg_write(sec_pmic, S5M8767_REG_INT1M + i,
|
|
|
0xff);
|
|
|
}
|
|
|
for (i = 0; i < S5M8767_IRQ_NR; i++) {
|
|
|
- cur_irq = i + s5m87xx->irq_base;
|
|
|
- irq_set_chip_data(cur_irq, s5m87xx);
|
|
|
+ cur_irq = i + sec_pmic->irq_base;
|
|
|
+ irq_set_chip_data(cur_irq, sec_pmic);
|
|
|
if (ret) {
|
|
|
- dev_err(s5m87xx->dev,
|
|
|
+ dev_err(sec_pmic->dev,
|
|
|
"Failed to irq_set_chip_data %d: %d\n",
|
|
|
- s5m87xx->irq, ret);
|
|
|
+ sec_pmic->irq, ret);
|
|
|
return ret;
|
|
|
}
|
|
|
|
|
@@ -436,40 +436,40 @@ int s5m_irq_init(struct s5m87xx_dev *s5m87xx)
|
|
|
#endif
|
|
|
}
|
|
|
|
|
|
- ret = request_threaded_irq(s5m87xx->irq, NULL,
|
|
|
+ ret = request_threaded_irq(sec_pmic->irq, NULL,
|
|
|
s5m8767_irq_thread,
|
|
|
IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
|
|
|
- "s5m87xx-irq", s5m87xx);
|
|
|
+ "sec-pmic-irq", sec_pmic);
|
|
|
if (ret) {
|
|
|
- dev_err(s5m87xx->dev, "Failed to request IRQ %d: %d\n",
|
|
|
- s5m87xx->irq, ret);
|
|
|
+ dev_err(sec_pmic->dev, "Failed to request IRQ %d: %d\n",
|
|
|
+ sec_pmic->irq, ret);
|
|
|
return ret;
|
|
|
}
|
|
|
break;
|
|
|
default:
|
|
|
- dev_err(s5m87xx->dev,
|
|
|
- "Unknown device type %d\n", s5m87xx->device_type);
|
|
|
+ dev_err(sec_pmic->dev,
|
|
|
+ "Unknown device type %d\n", sec_pmic->device_type);
|
|
|
return -EINVAL;
|
|
|
}
|
|
|
|
|
|
- if (!s5m87xx->ono)
|
|
|
+ if (!sec_pmic->ono)
|
|
|
return 0;
|
|
|
|
|
|
switch (type) {
|
|
|
case S5M8763X:
|
|
|
- ret = request_threaded_irq(s5m87xx->ono, NULL,
|
|
|
+ ret = request_threaded_irq(sec_pmic->ono, NULL,
|
|
|
s5m8763_irq_thread,
|
|
|
IRQF_TRIGGER_FALLING |
|
|
|
IRQF_TRIGGER_RISING |
|
|
|
- IRQF_ONESHOT, "s5m87xx-ono",
|
|
|
- s5m87xx);
|
|
|
+ IRQF_ONESHOT, "sec_pmic-ono",
|
|
|
+ sec_pmic);
|
|
|
break;
|
|
|
case S5M8767X:
|
|
|
- ret = request_threaded_irq(s5m87xx->ono, NULL,
|
|
|
+ ret = request_threaded_irq(sec_pmic->ono, NULL,
|
|
|
s5m8767_irq_thread,
|
|
|
IRQF_TRIGGER_FALLING |
|
|
|
IRQF_TRIGGER_RISING |
|
|
|
- IRQF_ONESHOT, "s5m87xx-ono", s5m87xx);
|
|
|
+ IRQF_ONESHOT, "sec_pmic-ono", sec_pmic);
|
|
|
break;
|
|
|
default:
|
|
|
ret = -EINVAL;
|
|
@@ -477,19 +477,19 @@ int s5m_irq_init(struct s5m87xx_dev *s5m87xx)
|
|
|
}
|
|
|
|
|
|
if (ret) {
|
|
|
- dev_err(s5m87xx->dev, "Failed to request IRQ %d: %d\n",
|
|
|
- s5m87xx->ono, ret);
|
|
|
+ dev_err(sec_pmic->dev, "Failed to request IRQ %d: %d\n",
|
|
|
+ sec_pmic->ono, ret);
|
|
|
return ret;
|
|
|
}
|
|
|
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
-void s5m_irq_exit(struct s5m87xx_dev *s5m87xx)
|
|
|
+void sec_irq_exit(struct sec_pmic_dev *sec_pmic)
|
|
|
{
|
|
|
- if (s5m87xx->ono)
|
|
|
- free_irq(s5m87xx->ono, s5m87xx);
|
|
|
+ if (sec_pmic->ono)
|
|
|
+ free_irq(sec_pmic->ono, sec_pmic);
|
|
|
|
|
|
- if (s5m87xx->irq)
|
|
|
- free_irq(s5m87xx->irq, s5m87xx);
|
|
|
+ if (sec_pmic->irq)
|
|
|
+ free_irq(sec_pmic->irq, sec_pmic);
|
|
|
}
|