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@@ -195,7 +195,7 @@ static void slic_debug_adapter_destroy(struct adapter *adapter);
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static void slic_debug_card_create(struct sliccard *card);
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static void slic_debug_card_destroy(struct sliccard *card);
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-static inline void slic_reg32_write(void __iomem *reg, u32 value, uint flush)
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+static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush)
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{
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writel(value, reg);
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if (flush)
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@@ -651,7 +651,7 @@ static int slic_entry_halt(struct net_device *dev)
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DBG_MSG("slicoss: %s (%s) set adapter[%p] state to ADAPT_DOWN(%d)\n",
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__func__, dev->name, adapter, adapter->state);
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ASSERT(card->adapter[adapter->cardindex] == adapter);
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- WRITE_REG(slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
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adapter->all_reg_writes++;
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adapter->icr_reg_writes++;
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slic_config_clear(adapter);
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@@ -663,7 +663,7 @@ static int slic_entry_halt(struct net_device *dev)
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adapter->activated = 0;
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}
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#ifdef AUTOMATIC_RESET
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- WRITE_REG(slic_regs->slic_reset_iface, 0, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH);
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#endif
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/*
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* Reset the adapter's rsp, cmd, and rcv queues
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@@ -1000,8 +1000,8 @@ static int slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
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}
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#endif
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if (hcmd->paddrh == 0) {
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- WRITE_REG(adapter->slic_regs->slic_cbar,
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- (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
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+ slic_reg32_write(&adapter->slic_regs->slic_cbar,
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+ (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
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} else {
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slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64,
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(hcmd->paddrl | hcmd->cmdsize),
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@@ -1251,7 +1251,8 @@ static irqreturn_t slic_interrupt(int irq, void *dev_id)
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u32 isr;
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if ((adapter->pshmem) && (adapter->pshmem->isr)) {
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- WRITE_REG(adapter->slic_regs->slic_icr, ICR_INT_MASK, FLUSH);
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+ slic_reg32_write(&adapter->slic_regs->slic_icr,
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+ ICR_INT_MASK, FLUSH);
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isr = adapter->isrcopy = adapter->pshmem->isr;
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adapter->pshmem->isr = 0;
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adapter->num_isrs++;
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@@ -1343,7 +1344,7 @@ static irqreturn_t slic_interrupt(int irq, void *dev_id)
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adapter->isrcopy = 0;
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adapter->all_reg_writes += 2;
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adapter->isr_reg_writes++;
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- WRITE_REG(adapter->slic_regs->slic_isr, 0, FLUSH);
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+ slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH);
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} else {
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adapter->false_interrupts++;
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}
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@@ -1633,8 +1634,9 @@ static void slic_mcast_set_mask(struct adapter *adapter)
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*/
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/* DBG_MSG("slicoss: %s macopts = MAC_ALLMCAST | MAC_PROMISC\n\
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SLUT MODE!!!\n",__func__); */
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- WRITE_REG(slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
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- WRITE_REG(slic_regs->slic_mcasthigh, 0xFFFFFFFF, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF,
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+ FLUSH);
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/* DBG_MSG("%s (%s) WRITE to slic_regs slic_mcastlow&high 0xFFFFFFFF\n",
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_func__, adapter->netdev->name); */
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} else {
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@@ -1646,11 +1648,10 @@ static void slic_mcast_set_mask(struct adapter *adapter)
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((ulong) (adapter->mcastmask & 0xFFFFFFFF)),
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((ulong) ((adapter->mcastmask >> 32) & 0xFFFFFFFF)));
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- WRITE_REG(slic_regs->slic_mcastlow,
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- (u32) (adapter->mcastmask & 0xFFFFFFFF), FLUSH);
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- WRITE_REG(slic_regs->slic_mcasthigh,
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- (u32) ((adapter->mcastmask >> 32) & 0xFFFFFFFF),
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- FLUSH);
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+ slic_reg32_write(&slic_regs->slic_mcastlow,
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+ (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH);
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+ slic_reg32_write(&slic_regs->slic_mcasthigh,
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+ (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH);
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}
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}
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@@ -1787,7 +1788,7 @@ static int slic_if_init(struct adapter *adapter)
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}
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DBG_MSG("slicoss: %s disable interrupts(slic)\n", __func__);
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- WRITE_REG(slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
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mdelay(1);
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if (!adapter->isp_initialized) {
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@@ -1797,13 +1798,13 @@ static int slic_if_init(struct adapter *adapter)
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adapter->bit64reglock.flags);
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#if defined(CONFIG_X86_64)
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- WRITE_REG(slic_regs->slic_addr_upper,
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- SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
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- WRITE_REG(slic_regs->slic_isp,
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- SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
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+ slic_reg32_write(&slic_regs->slic_addr_upper,
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+ SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
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+ slic_reg32_write(&slic_regs->slic_isp,
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+ SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
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#elif defined(CONFIG_X86)
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- WRITE_REG(slic_regs->slic_addr_upper, (u32) 0, DONT_FLUSH);
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- WRITE_REG(slic_regs->slic_isp, (u32) &pshmem->isr, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
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+ slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr, FLUSH);
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#else
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Stop Compilations
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#endif
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@@ -1858,8 +1859,8 @@ static int slic_if_init(struct adapter *adapter)
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DBG_MSG("slicoss: %s ENABLE interrupts(slic)\n", __func__);
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adapter->isrcopy = 0;
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adapter->pshmem->isr = 0;
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- WRITE_REG(slic_regs->slic_isr, 0, FLUSH);
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- WRITE_REG(slic_regs->slic_icr, ICR_INT_ON, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH);
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DBG_MSG("slicoss: %s call slic_link_config(slic)\n", __func__);
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slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
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@@ -1962,6 +1963,7 @@ static void slic_adapter_freeresources(struct adapter *adapter)
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static void slic_link_config(struct adapter *adapter,
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u32 linkspeed, u32 linkduplex)
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{
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+ u32 __iomem *wphy;
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u32 speed;
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u32 duplex;
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u32 phy_config;
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@@ -1986,6 +1988,8 @@ static void slic_link_config(struct adapter *adapter,
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if (linkduplex > LINK_AUTOD)
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linkduplex = LINK_AUTOD;
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+ wphy = &adapter->slic_regs->slic_wphy;
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+
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if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
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if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
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/* We've got a fiber gigabit interface, and register
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@@ -1996,8 +2000,7 @@ static void slic_link_config(struct adapter *adapter,
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phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
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/* enable PAUSE frames */
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phy_advreg |= PAR_ASYMPAUSE_FIBER;
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- WRITE_REG(adapter->slic_regs->slic_wphy, phy_advreg,
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- FLUSH);
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+ slic_reg32_write(wphy, phy_advreg, FLUSH);
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if (linkspeed == LINK_AUTOSPEED) {
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/* reset phy, enable auto-neg */
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@@ -2005,14 +2008,12 @@ static void slic_link_config(struct adapter *adapter,
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(MIICR_REG_PCR |
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(PCR_RESET | PCR_AUTONEG |
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PCR_AUTONEG_RST));
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- WRITE_REG(adapter->slic_regs->slic_wphy,
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- phy_config, FLUSH);
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+ slic_reg32_write(wphy, phy_config, FLUSH);
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} else { /* forced 1000 Mb FD*/
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/* power down phy to break link
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this may not work) */
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phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
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- WRITE_REG(adapter->slic_regs->slic_wphy,
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- phy_config, FLUSH);
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+ slic_reg32_write(wphy, phy_config, FLUSH);
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/* wait, Marvell says 1 sec,
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try to get away with 10 ms */
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mdelay(10);
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@@ -2023,8 +2024,7 @@ static void slic_link_config(struct adapter *adapter,
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(MIICR_REG_PCR |
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(PCR_RESET | PCR_SPEED_1000 |
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PCR_DUPLEX_FULL));
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- WRITE_REG(adapter->slic_regs->slic_wphy,
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- phy_config, FLUSH);
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+ slic_reg32_write(wphy, phy_config, FLUSH);
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}
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} else { /* copper gigabit */
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@@ -2048,35 +2048,30 @@ static void slic_link_config(struct adapter *adapter,
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phy_advreg |= PAR_ASYMPAUSE;
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/* required by the Cicada PHY */
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phy_advreg |= PAR_802_3;
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- WRITE_REG(adapter->slic_regs->slic_wphy, phy_advreg,
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- FLUSH);
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+ slic_reg32_write(wphy, phy_advreg, FLUSH);
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/* advertise FD only @1000 Mb */
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phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
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- WRITE_REG(adapter->slic_regs->slic_wphy, phy_gctlreg,
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- FLUSH);
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+ slic_reg32_write(wphy, phy_gctlreg, FLUSH);
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if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
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/* if a Marvell PHY
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enable auto crossover */
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phy_config =
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(MIICR_REG_16 | (MRV_REG16_XOVERON));
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- WRITE_REG(adapter->slic_regs->slic_wphy,
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- phy_config, FLUSH);
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+ slic_reg32_write(wphy, phy_config, FLUSH);
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/* reset phy, enable auto-neg */
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phy_config =
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(MIICR_REG_PCR |
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(PCR_RESET | PCR_AUTONEG |
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PCR_AUTONEG_RST));
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- WRITE_REG(adapter->slic_regs->slic_wphy,
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- phy_config, FLUSH);
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+ slic_reg32_write(wphy, phy_config, FLUSH);
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} else { /* it's a Cicada PHY */
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/* enable and restart auto-neg (don't reset) */
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phy_config =
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(MIICR_REG_PCR |
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(PCR_AUTONEG | PCR_AUTONEG_RST));
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- WRITE_REG(adapter->slic_regs->slic_wphy,
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- phy_config, FLUSH);
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+ slic_reg32_write(wphy, phy_config, FLUSH);
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}
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}
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} else {
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@@ -2094,13 +2089,12 @@ static void slic_link_config(struct adapter *adapter,
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/* if a Marvell PHY
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disable auto crossover */
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phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
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- WRITE_REG(adapter->slic_regs->slic_wphy, phy_config,
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- FLUSH);
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+ slic_reg32_write(wphy, phy_config, FLUSH);
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}
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/* power down phy to break link (this may not work) */
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phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
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- WRITE_REG(adapter->slic_regs->slic_wphy, phy_config, FLUSH);
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+ slic_reg32_write(wphy, phy_config, FLUSH);
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/* wait, Marvell says 1 sec, try to get away with 10 ms */
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mdelay(10);
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@@ -2111,13 +2105,11 @@ static void slic_link_config(struct adapter *adapter,
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soft reset phy, powerup */
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phy_config =
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(MIICR_REG_PCR | (PCR_RESET | speed | duplex));
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- WRITE_REG(adapter->slic_regs->slic_wphy, phy_config,
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- FLUSH);
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+ slic_reg32_write(wphy, phy_config, FLUSH);
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} else { /* it's a Cicada PHY */
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/* disable auto-neg, set speed, powerup */
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phy_config = (MIICR_REG_PCR | (speed | duplex));
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- WRITE_REG(adapter->slic_regs->slic_wphy, phy_config,
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- FLUSH);
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+ slic_reg32_write(wphy, phy_config, FLUSH);
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}
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}
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@@ -2204,28 +2196,27 @@ static int slic_card_download_gbrcv(struct adapter *adapter)
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break;
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}
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/* start download */
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- WRITE_REG(slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
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/* download the rcv sequencer ucode */
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for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
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/* write out instruction address */
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- WRITE_REG(slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
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instruction = *(u32 *)(fw->data + index);
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index += 4;
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/* write out the instruction data low addr */
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- WRITE_REG(slic_regs->slic_rcv_wcs,
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- instruction, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH);
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instruction = *(u8 *)(fw->data + index);
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index++;
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/* write out the instruction data high addr */
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- WRITE_REG(slic_regs->slic_rcv_wcs, (u8)instruction,
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- FLUSH);
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+ slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction,
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+ FLUSH);
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}
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/* download finished */
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release_firmware(fw);
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- WRITE_REG(slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
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return 0;
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}
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@@ -2287,15 +2278,15 @@ static int slic_card_download(struct adapter *adapter)
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for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
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/* Write out instruction address */
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- WRITE_REG(slic_regs->slic_wcs, baseaddress + codeaddr,
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- FLUSH);
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+ slic_reg32_write(&slic_regs->slic_wcs,
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+ baseaddress + codeaddr, FLUSH);
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/* Write out instruction to low addr */
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- WRITE_REG(slic_regs->slic_wcs, instruction, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
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instruction = *(u32 *)(fw->data + index);
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index += 4;
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/* Write out instruction to high addr */
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- WRITE_REG(slic_regs->slic_wcs, instruction, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
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instruction = *(u32 *)(fw->data + index);
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index += 4;
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}
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@@ -2312,15 +2303,17 @@ static int slic_card_download(struct adapter *adapter)
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(uint)section,baseaddress,thissectionsize);*/
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for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
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/* Write out instruction address */
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- WRITE_REG(slic_regs->slic_wcs,
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- SLIC_WCS_COMPARE | (baseaddress + codeaddr),
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- FLUSH);
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+ slic_reg32_write(&slic_regs->slic_wcs,
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+ SLIC_WCS_COMPARE | (baseaddress + codeaddr),
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+ FLUSH);
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/* Write out instruction to low addr */
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- WRITE_REG(slic_regs->slic_wcs, instruction, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_wcs, instruction,
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+ FLUSH);
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instruction = *(u32 *)(fw->data + index);
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index += 4;
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/* Write out instruction to high addr */
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- WRITE_REG(slic_regs->slic_wcs, instruction, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_wcs, instruction,
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+ FLUSH);
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instruction = *(u32 *)(fw->data + index);
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index += 4;
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@@ -2341,7 +2334,7 @@ static int slic_card_download(struct adapter *adapter)
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release_firmware(fw);
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/* Everything OK, kick off the card */
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mdelay(10);
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- WRITE_REG(slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
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/* stall for 20 ms, long enough for ucode to init card
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and reach mainloop */
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@@ -2386,9 +2379,7 @@ static void slic_adapter_set_hwaddr(struct adapter *adapter)
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static void slic_intagg_set(struct adapter *adapter, u32 value)
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{
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- __iomem struct slic_regs *slic_regs = adapter->slic_regs;
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-
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- WRITE_REG(slic_regs->slic_intagg, value, FLUSH);
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+ slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH);
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adapter->card->loadlevel_current = value;
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}
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@@ -2457,15 +2448,15 @@ static int slic_card_init(struct sliccard *card, struct adapter *adapter)
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} else {
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memset(peeprom, 0, sizeof(struct slic_eeprom));
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}
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- WRITE_REG(slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
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mdelay(1);
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pshmem = (struct slic_shmem *)adapter->phys_shmem;
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spin_lock_irqsave(&adapter->bit64reglock.lock,
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adapter->bit64reglock.flags);
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- WRITE_REG(slic_regs->slic_addr_upper, 0, DONT_FLUSH);
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- WRITE_REG(slic_regs->slic_isp,
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- SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
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+ slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
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+ slic_reg32_write(&slic_regs->slic_isp,
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+ SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
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spin_unlock_irqrestore(&adapter->bit64reglock.lock,
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adapter->bit64reglock.flags);
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@@ -2483,15 +2474,15 @@ static int slic_card_init(struct sliccard *card, struct adapter *adapter)
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&slic_regs->slic_isp, 0,
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&slic_regs->slic_addr_upper,
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0, FLUSH);
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- WRITE_REG(slic_regs->slic_isr, 0,
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- FLUSH);
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+ slic_reg32_write(&slic_regs->slic_isr,
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+ 0, FLUSH);
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slic_upr_request_complete(adapter, 0);
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break;
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} else {
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adapter->pshmem->isr = 0;
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- WRITE_REG(slic_regs->slic_isr, 0,
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- FLUSH);
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+ slic_reg32_write(&slic_regs->slic_isr,
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+ 0, FLUSH);
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}
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} else {
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mdelay(1);
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@@ -2820,14 +2811,15 @@ static void slic_soft_reset(struct adapter *adapter)
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if (adapter->card->state == CARD_UP) {
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DBG_MSG("slicoss: %s QUIESCE adapter[%p] card[%p] devid[%x]\n",
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__func__, adapter, adapter->card, adapter->devid);
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- WRITE_REG(adapter->slic_regs->slic_quiesce, 0, FLUSH);
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+ slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH);
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mdelay(1);
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}
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/* DBG_MSG ("slicoss: %s (%s) adapter[%p] card[%p] devid[%x]\n",
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__func__, adapter->netdev->name, adapter, adapter->card,
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adapter->devid); */
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- WRITE_REG(adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC, FLUSH);
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+ slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC,
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+ FLUSH);
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mdelay(1);
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}
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@@ -2858,7 +2850,7 @@ static void slic_config_set(struct adapter *adapter, bool linkchange)
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DBG_MSG("slicoss: FDX adapt[%p] set xmtcfg to [%x]\n", adapter,
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value);
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- WRITE_REG(slic_regs->slic_wxcfg, value, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
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/* Setup rcvcfg last */
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value = (RcrReset | /* Reset, if linkchange */
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@@ -2873,7 +2865,7 @@ static void slic_config_set(struct adapter *adapter, bool linkchange)
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DBG_MSG("slicoss: HDX adapt[%p] set xmtcfg to [%x]\n", adapter,
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value);
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- WRITE_REG(slic_regs->slic_wxcfg, value, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
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/* Setup rcvcfg last */
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value = (RcrReset | /* Reset, if linkchange */
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@@ -2891,7 +2883,7 @@ static void slic_config_set(struct adapter *adapter, bool linkchange)
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value |= GRCR_RCVALL;
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DBG_MSG("slicoss: adapt[%p] set rcvcfg to [%x]\n", adapter, value);
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- WRITE_REG(slic_regs->slic_wrcfg, value, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
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}
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/*
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@@ -2907,18 +2899,18 @@ static void slic_config_clear(struct adapter *adapter)
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value = (GXCR_RESET | /* Always reset */
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GXCR_PAUSEEN); /* Enable pause */
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- WRITE_REG(slic_regs->slic_wxcfg, value, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
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value = (GRCR_RESET | /* Always reset */
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GRCR_CTLEN | /* Enable CTL frames */
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GRCR_ADDRAEN | /* Address A enable */
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(GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
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- WRITE_REG(slic_regs->slic_wrcfg, value, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
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/* power down phy */
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phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
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- WRITE_REG(slic_regs->slic_wphy, phy_config, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH);
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}
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static void slic_config_get(struct adapter *adapter, u32 config,
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@@ -2940,14 +2932,14 @@ static void slic_mac_address_config(struct adapter *adapter)
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value = *(u32 *) &adapter->currmacaddr[2];
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value = ntohl(value);
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- WRITE_REG(slic_regs->slic_wraddral, value, FLUSH);
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- WRITE_REG(slic_regs->slic_wraddrbl, value, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH);
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value2 = (u32) ((adapter->currmacaddr[0] << 8 |
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adapter->currmacaddr[1]) & 0xFFFF);
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- WRITE_REG(slic_regs->slic_wraddrah, value2, FLUSH);
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- WRITE_REG(slic_regs->slic_wraddrbh, value2, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH);
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DBG_MSG("%s value1[%x] value2[%x] Call slic_mcast_set_mask\n",
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__func__, value, value2);
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@@ -2986,7 +2978,7 @@ static void slic_mac_config(struct adapter *adapter)
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}
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/* write mac config */
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- WRITE_REG(slic_regs->slic_wmcfg, value, FLUSH);
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+ slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH);
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/* setup mac addresses */
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slic_mac_address_config(adapter);
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@@ -3123,9 +3115,12 @@ static void slic_timer_load_check(ulong cardaddr)
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{
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struct sliccard *card = (struct sliccard *)cardaddr;
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struct adapter *adapter = card->master;
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+ u32 __iomem *intagg;
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u32 load = card->events;
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u32 level = 0;
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+ intagg = &adapter->slic_regs->slic_intagg;
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+
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if ((adapter) && (adapter->state == ADAPT_UP) &&
|
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(card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
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if (adapter->devid == SLIC_1GB_DEVICE_ID) {
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@@ -3147,8 +3142,7 @@ static void slic_timer_load_check(ulong cardaddr)
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}
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if (card->loadlevel_current != level) {
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card->loadlevel_current = level;
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- WRITE_REG(adapter->slic_regs->slic_intagg,
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- level, FLUSH);
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+ slic_reg32_write(intagg, level, FLUSH);
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}
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} else {
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if (load > SLIC_LOAD_5)
|
|
@@ -3165,8 +3159,7 @@ static void slic_timer_load_check(ulong cardaddr)
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level = SLIC_INTAGG_0;
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if (card->loadlevel_current != level) {
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|
card->loadlevel_current = level;
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|
- WRITE_REG(adapter->slic_regs->slic_intagg,
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|
- level, FLUSH);
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+ slic_reg32_write(intagg, level, FLUSH);
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}
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}
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}
|
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@@ -3413,7 +3406,8 @@ static void slic_upr_start(struct adapter *adapter)
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|
switch (upr->upr_request) {
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case SLIC_UPR_STATS:
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|
if (upr->upr_data_h == 0) {
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|
- WRITE_REG(slic_regs->slic_stats, upr->upr_data, FLUSH);
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|
+ slic_reg32_write(&slic_regs->slic_stats, upr->upr_data,
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|
+ FLUSH);
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|
} else {
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|
slic_reg64_write(adapter, &slic_regs->slic_stats64,
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|
|
upr->upr_data,
|
|
@@ -3456,7 +3450,7 @@ static void slic_upr_start(struct adapter *adapter)
|
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|
break;
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|
#endif
|
|
|
case SLIC_UPR_PING:
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|
- WRITE_REG(slic_regs->slic_ping, 1, FLUSH);
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|
+ slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH);
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|
break;
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default:
|
|
|
ASSERT(0);
|
|
@@ -3718,9 +3712,9 @@ static int slic_rspqueue_init(struct adapter *adapter)
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|
__func__, i, (void *)rspq->paddr[i], rspq->vaddr[i]); */
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|
|
if (paddrh == 0) {
|
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|
- WRITE_REG(slic_regs->slic_rbar,
|
|
|
- (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
|
|
|
- DONT_FLUSH);
|
|
|
+ slic_reg32_write(&slic_regs->slic_rbar,
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|
+ (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
|
|
|
+ DONT_FLUSH);
|
|
|
} else {
|
|
|
slic_reg64_write(adapter, &slic_regs->slic_rbar64,
|
|
|
(rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
|
|
@@ -4262,8 +4256,8 @@ retry_rcvqfill:
|
|
|
}
|
|
|
#endif
|
|
|
if (paddrh == 0) {
|
|
|
- WRITE_REG(adapter->slic_regs->slic_hbar,
|
|
|
- (u32) paddrl, DONT_FLUSH);
|
|
|
+ slic_reg32_write(&adapter->slic_regs->slic_hbar,
|
|
|
+ (u32)paddrl, DONT_FLUSH);
|
|
|
} else {
|
|
|
slic_reg64_write(adapter,
|
|
|
&adapter->slic_regs->slic_hbar64,
|
|
@@ -4320,8 +4314,8 @@ static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
|
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|
rcvq->count);
|
|
|
}
|
|
|
if (paddrh == 0) {
|
|
|
- WRITE_REG(adapter->slic_regs->slic_hbar, (u32) paddrl,
|
|
|
- DONT_FLUSH);
|
|
|
+ slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl,
|
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|
+ DONT_FLUSH);
|
|
|
} else {
|
|
|
slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64,
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|
|
paddrl, &adapter->slic_regs->slic_addr_upper,
|