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@@ -2190,7 +2190,14 @@ static int tg3_nvram_read_using_eeprom(struct tg3 *tp,
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if (!(tmp & EEPROM_ADDR_COMPLETE))
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if (!(tmp & EEPROM_ADDR_COMPLETE))
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return -EBUSY;
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return -EBUSY;
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- *val = tr32(GRC_EEPROM_DATA);
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+ tmp = tr32(GRC_EEPROM_DATA);
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+
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+ /*
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+ * The data will always be opposite the native endian
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+ * format. Perform a blind byteswap to compensate.
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+ */
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+ *val = swab32(tmp);
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+
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return 0;
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return 0;
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}
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}
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@@ -10663,7 +10670,13 @@ static int tg3_nvram_write_block_using_eeprom(struct tg3 *tp,
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memcpy(&data, buf + i, 4);
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memcpy(&data, buf + i, 4);
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- tw32(GRC_EEPROM_DATA, be32_to_cpu(data));
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+ /*
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+ * The SEEPROM interface expects the data to always be opposite
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+ * the native endian format. We accomplish this by reversing
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+ * all the operations that would have been performed on the
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+ * data from a call to tg3_nvram_read_be32().
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+ */
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+ tw32(GRC_EEPROM_DATA, swab32(be32_to_cpu(data)));
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val = tr32(GRC_EEPROM_ADDR);
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val = tr32(GRC_EEPROM_ADDR);
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tw32(GRC_EEPROM_ADDR, val | EEPROM_ADDR_COMPLETE);
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tw32(GRC_EEPROM_ADDR, val | EEPROM_ADDR_COMPLETE);
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@@ -12443,13 +12456,8 @@ static int __devinit tg3_get_device_address(struct tg3 *tp)
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/* Next, try NVRAM. */
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/* Next, try NVRAM. */
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if (!tg3_nvram_read_be32(tp, mac_offset + 0, &hi) &&
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if (!tg3_nvram_read_be32(tp, mac_offset + 0, &hi) &&
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!tg3_nvram_read_be32(tp, mac_offset + 4, &lo)) {
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!tg3_nvram_read_be32(tp, mac_offset + 4, &lo)) {
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- dev->dev_addr[0] = ((hi >> 16) & 0xff);
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- dev->dev_addr[1] = ((hi >> 24) & 0xff);
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- dev->dev_addr[2] = ((lo >> 0) & 0xff);
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- dev->dev_addr[3] = ((lo >> 8) & 0xff);
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- dev->dev_addr[4] = ((lo >> 16) & 0xff);
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- dev->dev_addr[5] = ((lo >> 24) & 0xff);
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-
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+ memcpy(&dev->dev_addr[0], ((char *)&hi) + 2, 2);
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+ memcpy(&dev->dev_addr[2], (char *)&lo, sizeof(lo));
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}
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}
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/* Finally just fetch it out of the MAC control regs. */
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/* Finally just fetch it out of the MAC control regs. */
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else {
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else {
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