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@@ -35,6 +35,8 @@
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#include "asp.h"
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#define DM355_UART2_BASE (IO_PHYS + 0x206000)
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+#define DM355_OSD_BASE (IO_PHYS + 0x70200)
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+#define DM355_VENC_BASE (IO_PHYS + 0x70400)
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/*
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* Device specific clocks
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@@ -744,11 +746,146 @@ static struct platform_device vpfe_capture_dev = {
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},
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};
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-void dm355_set_vpfe_config(struct vpfe_config *cfg)
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+static struct resource dm355_osd_resources[] = {
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+ {
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+ .start = DM355_OSD_BASE,
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+ .end = DM355_OSD_BASE + 0x17f,
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+ .flags = IORESOURCE_MEM,
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+ },
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+};
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+
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+static struct platform_device dm355_osd_dev = {
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+ .name = DM355_VPBE_OSD_SUBDEV_NAME,
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+ .id = -1,
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+ .num_resources = ARRAY_SIZE(dm355_osd_resources),
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+ .resource = dm355_osd_resources,
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+ .dev = {
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+ .dma_mask = &vpfe_capture_dma_mask,
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+ .coherent_dma_mask = DMA_BIT_MASK(32),
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+ },
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+};
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+
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+static struct resource dm355_venc_resources[] = {
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+ {
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+ .start = IRQ_VENCINT,
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+ .end = IRQ_VENCINT,
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+ .flags = IORESOURCE_IRQ,
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+ },
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+ /* venc registers io space */
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+ {
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+ .start = DM355_VENC_BASE,
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+ .end = DM355_VENC_BASE + 0x17f,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ /* VDAC config register io space */
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+ {
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+ .start = DAVINCI_SYSTEM_MODULE_BASE + SYSMOD_VDAC_CONFIG,
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+ .end = DAVINCI_SYSTEM_MODULE_BASE + SYSMOD_VDAC_CONFIG + 3,
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+ .flags = IORESOURCE_MEM,
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+ },
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+};
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+
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+static struct resource dm355_v4l2_disp_resources[] = {
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+ {
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+ .start = IRQ_VENCINT,
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+ .end = IRQ_VENCINT,
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+ .flags = IORESOURCE_IRQ,
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+ },
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+ /* venc registers io space */
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+ {
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+ .start = DM355_VENC_BASE,
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+ .end = DM355_VENC_BASE + 0x17f,
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+ .flags = IORESOURCE_MEM,
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+ },
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+};
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+
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+static int dm355_vpbe_setup_pinmux(enum v4l2_mbus_pixelcode if_type,
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+ int field)
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+{
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+ switch (if_type) {
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+ case V4L2_MBUS_FMT_SGRBG8_1X8:
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+ davinci_cfg_reg(DM355_VOUT_FIELD_G70);
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+ break;
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+ case V4L2_MBUS_FMT_YUYV10_1X20:
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+ if (field)
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+ davinci_cfg_reg(DM355_VOUT_FIELD);
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+ else
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+ davinci_cfg_reg(DM355_VOUT_FIELD_G70);
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+ break;
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+ default:
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+ return -EINVAL;
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+ }
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+
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+ davinci_cfg_reg(DM355_VOUT_COUTL_EN);
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+ davinci_cfg_reg(DM355_VOUT_COUTH_EN);
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+
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+ return 0;
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+}
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+
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+static int dm355_venc_setup_clock(enum vpbe_enc_timings_type type,
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+ unsigned int pclock)
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{
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- vpfe_capture_dev.dev.platform_data = cfg;
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+ void __iomem *vpss_clk_ctrl_reg;
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+
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+ vpss_clk_ctrl_reg = DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL);
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+
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+ switch (type) {
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+ case VPBE_ENC_STD:
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+ writel(VPSS_DACCLKEN_ENABLE | VPSS_VENCCLKEN_ENABLE,
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+ vpss_clk_ctrl_reg);
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+ break;
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+ case VPBE_ENC_DV_TIMINGS:
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+ if (pclock > 27000000)
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+ /*
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+ * For HD, use external clock source since we cannot
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+ * support HD mode with internal clocks.
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+ */
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+ writel(VPSS_MUXSEL_EXTCLK_ENABLE, vpss_clk_ctrl_reg);
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+ break;
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+ default:
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+ return -EINVAL;
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+ }
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+
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+ return 0;
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}
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+static struct platform_device dm355_vpbe_display = {
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+ .name = "vpbe-v4l2",
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+ .id = -1,
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+ .num_resources = ARRAY_SIZE(dm355_v4l2_disp_resources),
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+ .resource = dm355_v4l2_disp_resources,
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+ .dev = {
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+ .dma_mask = &vpfe_capture_dma_mask,
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+ .coherent_dma_mask = DMA_BIT_MASK(32),
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+ },
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+};
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+
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+struct venc_platform_data dm355_venc_pdata = {
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+ .setup_pinmux = dm355_vpbe_setup_pinmux,
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+ .setup_clock = dm355_venc_setup_clock,
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+};
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+
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+static struct platform_device dm355_venc_dev = {
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+ .name = DM355_VPBE_VENC_SUBDEV_NAME,
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+ .id = -1,
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+ .num_resources = ARRAY_SIZE(dm355_venc_resources),
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+ .resource = dm355_venc_resources,
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+ .dev = {
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+ .dma_mask = &vpfe_capture_dma_mask,
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+ .coherent_dma_mask = DMA_BIT_MASK(32),
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+ .platform_data = (void *)&dm355_venc_pdata,
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+ },
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+};
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+
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+static struct platform_device dm355_vpbe_dev = {
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+ .name = "vpbe_controller",
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+ .id = -1,
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+ .dev = {
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+ .dma_mask = &vpfe_capture_dma_mask,
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+ .coherent_dma_mask = DMA_BIT_MASK(32),
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+ },
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+};
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+
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/*----------------------------------------------------------------------*/
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static struct map_desc dm355_io_desc[] = {
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@@ -868,6 +1005,29 @@ void __init dm355_init(void)
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davinci_map_sysmod();
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}
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+int __init dm355_init_video(struct vpfe_config *vpfe_cfg,
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+ struct vpbe_config *vpbe_cfg)
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+{
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+ if (vpfe_cfg || vpbe_cfg)
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+ platform_device_register(&dm355_vpss_device);
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+
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+ if (vpfe_cfg) {
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+ vpfe_capture_dev.dev.platform_data = vpfe_cfg;
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+ platform_device_register(&dm355_ccdc_dev);
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+ platform_device_register(&vpfe_capture_dev);
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+ }
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+
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+ if (vpbe_cfg) {
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+ dm355_vpbe_dev.dev.platform_data = vpbe_cfg;
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+ platform_device_register(&dm355_osd_dev);
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+ platform_device_register(&dm355_venc_dev);
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+ platform_device_register(&dm355_vpbe_dev);
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+ platform_device_register(&dm355_vpbe_display);
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+ }
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+
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+ return 0;
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+}
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+
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static int __init dm355_init_devices(void)
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{
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if (!cpu_is_davinci_dm355())
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@@ -875,9 +1035,6 @@ static int __init dm355_init_devices(void)
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davinci_cfg_reg(DM355_INT_EDMA_CC);
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platform_device_register(&dm355_edma_device);
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- platform_device_register(&dm355_vpss_device);
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- platform_device_register(&dm355_ccdc_dev);
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- platform_device_register(&vpfe_capture_dev);
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return 0;
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}
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