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@@ -35,6 +35,9 @@
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#define PCI_VENDOR_ID_ETRON 0x1b6f
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#define PCI_DEVICE_ID_ASROCK_P67 0x7023
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+#define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI 0x8c31
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+#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI 0x9c31
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+
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static const char hcd_name[] = "xhci_hcd";
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/* called after powerup, by probe or system-pm "wakeup" */
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@@ -69,6 +72,14 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
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"QUIRK: Fresco Logic xHC needs configure"
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" endpoint cmd after reset endpoint");
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}
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+ if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
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+ pdev->revision == 0x4) {
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+ xhci->quirks |= XHCI_SLOW_SUSPEND;
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+ xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
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+ "QUIRK: Fresco Logic xHC revision %u"
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+ "must be suspended extra slowly",
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+ pdev->revision);
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+ }
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/* Fresco Logic confirms: all revisions of this chip do not
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* support MSI, even though some of them claim to in their PCI
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* capabilities.
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@@ -110,6 +121,15 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
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xhci->quirks |= XHCI_SPURIOUS_REBOOT;
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xhci->quirks |= XHCI_AVOID_BEI;
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}
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+ if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
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+ (pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI ||
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+ pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI)) {
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+ /* Workaround for occasional spurious wakeups from S5 (or
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+ * any other sleep) on Haswell machines with LPT and LPT-LP
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+ * with the new Intel BIOS
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+ */
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+ xhci->quirks |= XHCI_SPURIOUS_WAKEUP;
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+ }
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if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
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pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
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xhci->quirks |= XHCI_RESET_ON_RESUME;
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@@ -217,6 +237,11 @@ static void xhci_pci_remove(struct pci_dev *dev)
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usb_put_hcd(xhci->shared_hcd);
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}
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usb_hcd_pci_remove(dev);
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+
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+ /* Workaround for spurious wakeups at shutdown with HSW */
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+ if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
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+ pci_set_power_state(dev, PCI_D3hot);
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+
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kfree(xhci);
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}
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