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@@ -24,7 +24,7 @@
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* bat later if I did something naughty.
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* 10-11-2000 SJH Added private NAND flash structure for driver
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* 10-24-2000 SJH Added prototype for 'nand_scan' function
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- * 10-29-2001 TG changed nand_chip structure to support
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+ * 10-29-2001 TG changed nand_chip structure to support
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* hardwarespecific function for accessing control lines
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* 02-21-2002 TG added support for different read/write adress and
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* ready/busy line access function
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@@ -36,21 +36,21 @@
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* CONFIG_MTD_NAND_ECC_JFFS2 is not set
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* 08-10-2002 TG extensions to nand_chip structure to support HW-ECC
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*
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- * 08-29-2002 tglx nand_chip structure: data_poi for selecting
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+ * 08-29-2002 tglx nand_chip structure: data_poi for selecting
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* internal / fs-driver buffer
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* support for 6byte/512byte hardware ECC
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* read_ecc, write_ecc extended for different oob-layout
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* oob layout selections: NAND_NONE_OOB, NAND_JFFS2_OOB,
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* NAND_YAFFS_OOB
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* 11-25-2002 tglx Added Manufacturer code FUJITSU, NATIONAL
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- * Split manufacturer and device ID structures
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+ * Split manufacturer and device ID structures
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*
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* 02-08-2004 tglx added option field to nand structure for chip anomalities
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* 05-25-2004 tglx added bad block table support, ST-MICRO manufacturer id
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* update of nand_chip structure description
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- * 01-17-2005 dmarlin added extended commands for AG-AND device and added option
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+ * 01-17-2005 dmarlin added extended commands for AG-AND device and added option
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* for BBT_AUTO_REFRESH.
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- * 01-20-2005 dmarlin added optional pointer to hardware specific callback for
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+ * 01-20-2005 dmarlin added optional pointer to hardware specific callback for
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* extra error status checks.
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*/
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#ifndef __LINUX_MTD_NAND_H
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@@ -120,8 +120,8 @@ extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_
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#define NAND_CMD_CACHEDPROG 0x15
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/* Extended commands for AG-AND device */
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-/*
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- * Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but
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+/*
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+ * Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but
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* there is no way to distinguish that from NAND_CMD_READ0
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* until the remaining sequence of commands has been completed
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* so add a high order bit and mask it off in the command.
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@@ -145,7 +145,7 @@ extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_
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#define NAND_STATUS_READY 0x40
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#define NAND_STATUS_WP 0x80
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-/*
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+/*
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* Constants for ECC_MODES
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*/
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@@ -191,12 +191,12 @@ extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_
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#define NAND_CACHEPRG 0x00000008
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/* Chip has copy back function */
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#define NAND_COPYBACK 0x00000010
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-/* AND Chip which has 4 banks and a confusing page / block
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+/* AND Chip which has 4 banks and a confusing page / block
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* assignment. See Renesas datasheet for further information */
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#define NAND_IS_AND 0x00000020
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/* Chip has a array of 4 pages which can be read without
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* additional ready /busy waits */
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-#define NAND_4PAGE_ARRAY 0x00000040
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+#define NAND_4PAGE_ARRAY 0x00000040
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/* Chip requires that BBT is periodically rewritten to prevent
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* bits from adjacent blocks from 'leaking' in altering data.
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* This happens with the Renesas AG-AND chips, possibly others. */
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@@ -219,8 +219,8 @@ extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_
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/* Use a flash based bad block table. This option is passed to the
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* default bad block table function. */
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#define NAND_USE_FLASH_BBT 0x00010000
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-/* The hw ecc generator provides a syndrome instead a ecc value on read
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- * This can only work if we have the ecc bytes directly behind the
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+/* The hw ecc generator provides a syndrome instead a ecc value on read
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+ * This can only work if we have the ecc bytes directly behind the
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* data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */
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#define NAND_HWECC_SYNDROME 0x00020000
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/* This option skips the bbt scan during initialization. */
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@@ -252,7 +252,7 @@ struct nand_chip;
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/**
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* struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independend devices
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- * @lock: protection lock
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+ * @lock: protection lock
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* @active: the mtd device which holds the controller currently
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* @wq: wait queue to sleep on if a NAND operation is in progress
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* used instead of the per chip wait queue when a hw controller is available
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@@ -265,8 +265,8 @@ struct nand_hw_control {
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/**
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* struct nand_chip - NAND Private Flash Chip Data
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- * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device
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- * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device
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+ * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device
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+ * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device
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* @read_byte: [REPLACEABLE] read one byte from the chip
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* @write_byte: [REPLACEABLE] write one byte to the chip
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* @read_word: [REPLACEABLE] read one word from the chip
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@@ -289,7 +289,7 @@ struct nand_hw_control {
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* be provided if a hardware ECC is available
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* @erase_cmd: [INTERN] erase command write function, selectable due to AND support
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* @scan_bbt: [REPLACEABLE] function to scan bad block table
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- * @eccmode: [BOARDSPECIFIC] mode of ecc, see defines
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+ * @eccmode: [BOARDSPECIFIC] mode of ecc, see defines
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* @eccsize: [INTERN] databytes used per ecc-calculation
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* @eccbytes: [INTERN] number of ecc bytes per ecc-calculation step
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* @eccsteps: [INTERN] number of ecc calculation steps per page
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@@ -301,7 +301,7 @@ struct nand_hw_control {
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* @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock
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* @bbt_erase_shift: [INTERN] number of address bits in a bbt entry
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* @chip_shift: [INTERN] number of address bits in one chip
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- * @data_buf: [INTERN] internal buffer for one page + oob
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+ * @data_buf: [INTERN] internal buffer for one page + oob
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* @oob_buf: [INTERN] oob buffer for one eraseblock
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* @oobdirty: [INTERN] indicates that oob_buf must be reinitialized
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* @data_poi: [INTERN] pointer to a data buffer
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@@ -316,22 +316,22 @@ struct nand_hw_control {
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* @bbt: [INTERN] bad block table pointer
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* @bbt_td: [REPLACEABLE] bad block table descriptor for flash lookup
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* @bbt_md: [REPLACEABLE] bad block table mirror descriptor
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- * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial bad block scan
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+ * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial bad block scan
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* @controller: [OPTIONAL] a pointer to a hardware controller structure which is shared among multiple independend devices
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* @priv: [OPTIONAL] pointer to private chip date
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- * @errstat: [OPTIONAL] hardware specific function to perform additional error status checks
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+ * @errstat: [OPTIONAL] hardware specific function to perform additional error status checks
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* (determine if errors are correctable)
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*/
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-
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+
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struct nand_chip {
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void __iomem *IO_ADDR_R;
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void __iomem *IO_ADDR_W;
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-
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+
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u_char (*read_byte)(struct mtd_info *mtd);
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void (*write_byte)(struct mtd_info *mtd, u_char byte);
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u16 (*read_word)(struct mtd_info *mtd);
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void (*write_word)(struct mtd_info *mtd, u16 word);
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-
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+
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void (*write_buf)(struct mtd_info *mtd, const u_char *buf, int len);
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void (*read_buf)(struct mtd_info *mtd, u_char *buf, int len);
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int (*verify_buf)(struct mtd_info *mtd, const u_char *buf, int len);
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@@ -396,7 +396,7 @@ struct nand_chip {
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* @name: Identify the device type
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* @id: device ID code
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* @pagesize: Pagesize in bytes. Either 256 or 512 or 0
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- * If the pagesize is 0, then the real pagesize
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+ * If the pagesize is 0, then the real pagesize
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* and the eraseize are determined from the
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* extended id bytes in the chip
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* @erasesize: Size of an erase block in the flash device.
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@@ -425,7 +425,7 @@ struct nand_manufacturers {
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extern struct nand_flash_dev nand_flash_ids[];
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extern struct nand_manufacturers nand_manuf_ids[];
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-/**
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+/**
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* struct nand_bbt_descr - bad block table descriptor
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* @options: options for this descriptor
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* @pages: the page(s) where we find the bbt, used with option BBT_ABSPAGE
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@@ -436,14 +436,14 @@ extern struct nand_manufacturers nand_manuf_ids[];
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* @version: version read from the bbt page during scan
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* @len: length of the pattern, if 0 no pattern check is performed
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* @maxblocks: maximum number of blocks to search for a bbt. This number of
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- * blocks is reserved at the end of the device where the tables are
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+ * blocks is reserved at the end of the device where the tables are
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* written.
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* @reserved_block_code: if non-0, this pattern denotes a reserved (rather than
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* bad) block in the stored bbt
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- * @pattern: pattern to identify bad block table or factory marked good /
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+ * @pattern: pattern to identify bad block table or factory marked good /
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* bad blocks, can be NULL, if len = 0
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*
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- * Descriptor for the bad block table marker and the descriptor for the
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+ * Descriptor for the bad block table marker and the descriptor for the
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* pattern which identifies good and bad blocks. The assumption is made
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* that the pattern and the version count are always located in the oob area
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* of the first block.
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