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@@ -7,9 +7,9 @@
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/*
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* Generally, all registers can be read like memory, i.e., with quadlet read or
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- * block read transactions with any alignment or length. Writes are not
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- * allowed except where noted; quadlet-sized registers must be written with
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- * a quadlet write transaction.
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+ * block read transactions with at least quadlet-aligned offset and length.
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+ * Writes are not allowed except where noted; quadlet-sized registers must be
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+ * written with a quadlet write transaction.
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*
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* All values are in big endian. The DICE firmware runs on a little-endian CPU
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* and just byte-swaps _all_ quadlets on the bus, so values without endianness
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