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@@ -2582,39 +2582,39 @@ static void wlc_gpio_init(struct wlc_info *wlc)
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gc = gm = 0;
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/* Allocate GPIOs for mimo antenna diversity feature */
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- if (WLANTSEL_ENAB(wlc)) {
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- if (wlc_hw->antsel_type == ANTSEL_2x3) {
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- /* Enable antenna diversity, use 2x3 mode */
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- wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
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- MHF3_ANTSEL_EN, WLC_BAND_ALL);
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- wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE,
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- MHF3_ANTSEL_MODE, WLC_BAND_ALL);
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-
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- /* init superswitch control */
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- wlc_phy_antsel_init(wlc_hw->band->pi, false);
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-
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- } else if (wlc_hw->antsel_type == ANTSEL_2x4) {
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- ASSERT((gm & BOARD_GPIO_12) == 0);
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- gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13);
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- /* The board itself is powered by these GPIOs (when not sending pattern)
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- * So set them high
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- */
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- OR_REG(osh, ®s->psm_gpio_oe,
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- (BOARD_GPIO_12 | BOARD_GPIO_13));
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- OR_REG(osh, ®s->psm_gpio_out,
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- (BOARD_GPIO_12 | BOARD_GPIO_13));
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-
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- /* Enable antenna diversity, use 2x4 mode */
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- wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
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- MHF3_ANTSEL_EN, WLC_BAND_ALL);
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- wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0,
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- WLC_BAND_ALL);
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-
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- /* Configure the desired clock to be 4Mhz */
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- wlc_bmac_write_shm(wlc_hw, M_ANTSEL_CLKDIV,
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- ANTSEL_CLKDIV_4MHZ);
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- }
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+ if (wlc_hw->antsel_type == ANTSEL_2x3) {
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+ /* Enable antenna diversity, use 2x3 mode */
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+ wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
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+ MHF3_ANTSEL_EN, WLC_BAND_ALL);
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+ wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE,
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+ MHF3_ANTSEL_MODE, WLC_BAND_ALL);
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+
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+ /* init superswitch control */
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+ wlc_phy_antsel_init(wlc_hw->band->pi, false);
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+
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+ } else if (wlc_hw->antsel_type == ANTSEL_2x4) {
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+ ASSERT((gm & BOARD_GPIO_12) == 0);
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+ gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13);
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+ /*
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+ * The board itself is powered by these GPIOs
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+ * (when not sending pattern) so set them high
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+ */
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+ OR_REG(osh, ®s->psm_gpio_oe,
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+ (BOARD_GPIO_12 | BOARD_GPIO_13));
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+ OR_REG(osh, ®s->psm_gpio_out,
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+ (BOARD_GPIO_12 | BOARD_GPIO_13));
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+
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+ /* Enable antenna diversity, use 2x4 mode */
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+ wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
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+ MHF3_ANTSEL_EN, WLC_BAND_ALL);
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+ wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0,
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+ WLC_BAND_ALL);
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+
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+ /* Configure the desired clock to be 4Mhz */
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+ wlc_bmac_write_shm(wlc_hw, M_ANTSEL_CLKDIV,
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+ ANTSEL_CLKDIV_4MHZ);
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}
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+
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/* gpio 9 controls the PA. ucode is responsible for wiggling out and oe */
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if (wlc_hw->boardflags & BFL_PACTRL)
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gm |= gc |= BOARD_GPIO_PACTRL;
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