|
@@ -725,11 +725,11 @@ static const u8 rtl8187b_reg_table[][3] = {
|
|
|
{0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
|
|
|
{0x73, 0x9A, 2},
|
|
|
|
|
|
- {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
|
|
|
- {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
|
|
|
- {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
|
|
|
- {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
|
|
|
- {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x4C, 0x00, 2},
|
|
|
+ {0x5B, 0x40, 0}, {0x84, 0x88, 0}, {0x85, 0x24, 0}, {0x88, 0x54, 0},
|
|
|
+ {0x8B, 0xB8, 0}, {0x8C, 0x07, 0}, {0x8D, 0x00, 0}, {0x94, 0x1B, 0},
|
|
|
+ {0x95, 0x12, 0}, {0x96, 0x00, 0}, {0x97, 0x06, 0}, {0x9D, 0x1A, 0},
|
|
|
+ {0x9F, 0x10, 0}, {0xB4, 0x22, 0}, {0xBE, 0x80, 0}, {0xDB, 0x00, 0},
|
|
|
+ {0xEE, 0x00, 0}, {0x4C, 0x00, 2},
|
|
|
|
|
|
{0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0},
|
|
|
{0x8F, 0x00, 0}
|
|
@@ -770,7 +770,11 @@ static int rtl8187b_init_hw(struct ieee80211_hw *dev)
|
|
|
if (res)
|
|
|
return res;
|
|
|
|
|
|
- rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF);
|
|
|
+ /* BRSR (Basic Rate Set Register) on 8187B looks to be the same as
|
|
|
+ * RESP_RATE on 8187L in Realtek sources: each bit should be each
|
|
|
+ * one of the 12 rates, all are enabled */
|
|
|
+ rtl818x_iowrite16(priv, (__le16 *)0xFF34, 0x0FFF);
|
|
|
+
|
|
|
reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
|
|
|
reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
|
|
|
rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
|