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@@ -146,31 +146,36 @@
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* code when reading or writing virtual registers.
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*/
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#define PMBUS_VIRT_BASE 0x100
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-#define PMBUS_VIRT_READ_TEMP_MIN (PMBUS_VIRT_BASE + 0)
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-#define PMBUS_VIRT_READ_TEMP_MAX (PMBUS_VIRT_BASE + 1)
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-#define PMBUS_VIRT_RESET_TEMP_HISTORY (PMBUS_VIRT_BASE + 2)
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-#define PMBUS_VIRT_READ_VIN_AVG (PMBUS_VIRT_BASE + 3)
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-#define PMBUS_VIRT_READ_VIN_MIN (PMBUS_VIRT_BASE + 4)
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-#define PMBUS_VIRT_READ_VIN_MAX (PMBUS_VIRT_BASE + 5)
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-#define PMBUS_VIRT_RESET_VIN_HISTORY (PMBUS_VIRT_BASE + 6)
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-#define PMBUS_VIRT_READ_IIN_AVG (PMBUS_VIRT_BASE + 7)
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-#define PMBUS_VIRT_READ_IIN_MIN (PMBUS_VIRT_BASE + 8)
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-#define PMBUS_VIRT_READ_IIN_MAX (PMBUS_VIRT_BASE + 9)
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-#define PMBUS_VIRT_RESET_IIN_HISTORY (PMBUS_VIRT_BASE + 10)
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-#define PMBUS_VIRT_READ_PIN_AVG (PMBUS_VIRT_BASE + 11)
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-#define PMBUS_VIRT_READ_PIN_MAX (PMBUS_VIRT_BASE + 12)
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-#define PMBUS_VIRT_RESET_PIN_HISTORY (PMBUS_VIRT_BASE + 13)
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-#define PMBUS_VIRT_READ_VOUT_AVG (PMBUS_VIRT_BASE + 14)
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-#define PMBUS_VIRT_READ_VOUT_MIN (PMBUS_VIRT_BASE + 15)
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-#define PMBUS_VIRT_READ_VOUT_MAX (PMBUS_VIRT_BASE + 16)
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-#define PMBUS_VIRT_RESET_VOUT_HISTORY (PMBUS_VIRT_BASE + 17)
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-#define PMBUS_VIRT_READ_IOUT_AVG (PMBUS_VIRT_BASE + 18)
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-#define PMBUS_VIRT_READ_IOUT_MIN (PMBUS_VIRT_BASE + 19)
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-#define PMBUS_VIRT_READ_IOUT_MAX (PMBUS_VIRT_BASE + 20)
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-#define PMBUS_VIRT_RESET_IOUT_HISTORY (PMBUS_VIRT_BASE + 21)
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-#define PMBUS_VIRT_READ_TEMP2_MIN (PMBUS_VIRT_BASE + 22)
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-#define PMBUS_VIRT_READ_TEMP2_MAX (PMBUS_VIRT_BASE + 23)
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-#define PMBUS_VIRT_RESET_TEMP2_HISTORY (PMBUS_VIRT_BASE + 24)
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+#define PMBUS_VIRT_READ_TEMP_AVG (PMBUS_VIRT_BASE + 0)
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+#define PMBUS_VIRT_READ_TEMP_MIN (PMBUS_VIRT_BASE + 1)
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+#define PMBUS_VIRT_READ_TEMP_MAX (PMBUS_VIRT_BASE + 2)
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+#define PMBUS_VIRT_RESET_TEMP_HISTORY (PMBUS_VIRT_BASE + 3)
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+#define PMBUS_VIRT_READ_VIN_AVG (PMBUS_VIRT_BASE + 4)
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+#define PMBUS_VIRT_READ_VIN_MIN (PMBUS_VIRT_BASE + 5)
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+#define PMBUS_VIRT_READ_VIN_MAX (PMBUS_VIRT_BASE + 6)
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+#define PMBUS_VIRT_RESET_VIN_HISTORY (PMBUS_VIRT_BASE + 7)
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+#define PMBUS_VIRT_READ_IIN_AVG (PMBUS_VIRT_BASE + 8)
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+#define PMBUS_VIRT_READ_IIN_MIN (PMBUS_VIRT_BASE + 9)
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+#define PMBUS_VIRT_READ_IIN_MAX (PMBUS_VIRT_BASE + 10)
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+#define PMBUS_VIRT_RESET_IIN_HISTORY (PMBUS_VIRT_BASE + 11)
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+#define PMBUS_VIRT_READ_PIN_AVG (PMBUS_VIRT_BASE + 12)
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+#define PMBUS_VIRT_READ_PIN_MAX (PMBUS_VIRT_BASE + 13)
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+#define PMBUS_VIRT_RESET_PIN_HISTORY (PMBUS_VIRT_BASE + 14)
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+#define PMBUS_VIRT_READ_POUT_AVG (PMBUS_VIRT_BASE + 15)
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+#define PMBUS_VIRT_READ_POUT_MAX (PMBUS_VIRT_BASE + 16)
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+#define PMBUS_VIRT_RESET_POUT_HISTORY (PMBUS_VIRT_BASE + 17)
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+#define PMBUS_VIRT_READ_VOUT_AVG (PMBUS_VIRT_BASE + 18)
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+#define PMBUS_VIRT_READ_VOUT_MIN (PMBUS_VIRT_BASE + 19)
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+#define PMBUS_VIRT_READ_VOUT_MAX (PMBUS_VIRT_BASE + 20)
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+#define PMBUS_VIRT_RESET_VOUT_HISTORY (PMBUS_VIRT_BASE + 21)
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+#define PMBUS_VIRT_READ_IOUT_AVG (PMBUS_VIRT_BASE + 22)
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+#define PMBUS_VIRT_READ_IOUT_MIN (PMBUS_VIRT_BASE + 23)
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+#define PMBUS_VIRT_READ_IOUT_MAX (PMBUS_VIRT_BASE + 24)
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+#define PMBUS_VIRT_RESET_IOUT_HISTORY (PMBUS_VIRT_BASE + 25)
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+#define PMBUS_VIRT_READ_TEMP2_AVG (PMBUS_VIRT_BASE + 26)
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+#define PMBUS_VIRT_READ_TEMP2_MIN (PMBUS_VIRT_BASE + 27)
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+#define PMBUS_VIRT_READ_TEMP2_MAX (PMBUS_VIRT_BASE + 28)
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+#define PMBUS_VIRT_RESET_TEMP2_HISTORY (PMBUS_VIRT_BASE + 29)
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/*
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* CAPABILITY
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