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@@ -4,6 +4,7 @@
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#define ARCH_HAS_IOREMAP_WC
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#include <linux/compiler.h>
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+#include <asm-generic/int-ll64.h>
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#define build_mmio_read(name, size, type, reg, barrier) \
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static inline type name(const volatile void __iomem *addr) \
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@@ -45,20 +46,40 @@ build_mmio_write(__writel, "l", unsigned int, "r", )
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#define mmiowb() barrier()
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#ifdef CONFIG_X86_64
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+
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build_mmio_read(readq, "q", unsigned long, "=r", :"memory")
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-build_mmio_read(__readq, "q", unsigned long, "=r", )
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build_mmio_write(writeq, "q", unsigned long, "r", :"memory")
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-build_mmio_write(__writeq, "q", unsigned long, "r", )
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-#define readq_relaxed(a) __readq(a)
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-#define __raw_readq __readq
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-#define __raw_writeq writeq
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+#else
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+
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+static inline __u64 readq(const volatile void __iomem *addr)
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+{
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+ const volatile u32 __iomem *p = addr;
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+ u32 low, high;
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+
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+ low = readl(p);
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+ high = readl(p + 1);
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+
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+ return low + ((u64)high << 32);
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+}
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+
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+static inline void writeq(__u64 val, volatile void __iomem *addr)
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+{
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+ writel(val, addr);
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+ writel(val >> 32, addr+4);
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+}
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-/* Let people know we have them */
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-#define readq readq
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-#define writeq writeq
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#endif
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+#define readq_relaxed(a) readq(a)
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+
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+#define __raw_readq(a) readq(a)
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+#define __raw_writeq(val, addr) writeq(val, addr)
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+
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+/* Let people know that we have them */
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+#define readq readq
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+#define writeq writeq
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+
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extern int iommu_bio_merge;
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#ifdef CONFIG_X86_32
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