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@@ -25,6 +25,11 @@
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#define EXYNOS4_PA_SYSRAM 0x02020000
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#define EXYNOS4_PA_SYSRAM 0x02020000
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+#define EXYNOS4_PA_FIMC0 0x11800000
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+#define EXYNOS4_PA_FIMC1 0x11810000
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+#define EXYNOS4_PA_FIMC2 0x11820000
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+#define EXYNOS4_PA_FIMC3 0x11830000
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+
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#define EXYNOS4_PA_I2S0 0x03830000
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#define EXYNOS4_PA_I2S0 0x03830000
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#define EXYNOS4_PA_I2S1 0xE3100000
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#define EXYNOS4_PA_I2S1 0xE3100000
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#define EXYNOS4_PA_I2S2 0xE2A00000
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#define EXYNOS4_PA_I2S2 0xE2A00000
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@@ -120,6 +125,10 @@
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#define S3C_PA_WDT EXYNOS4_PA_WATCHDOG
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#define S3C_PA_WDT EXYNOS4_PA_WATCHDOG
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#define S5P_PA_CHIPID EXYNOS4_PA_CHIPID
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#define S5P_PA_CHIPID EXYNOS4_PA_CHIPID
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+#define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0
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+#define S5P_PA_FIMC1 EXYNOS4_PA_FIMC1
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+#define S5P_PA_FIMC2 EXYNOS4_PA_FIMC2
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+#define S5P_PA_FIMC3 EXYNOS4_PA_FIMC3
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#define S5P_PA_MIPI_CSIS0 EXYNOS4_PA_MIPI_CSIS0
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#define S5P_PA_MIPI_CSIS0 EXYNOS4_PA_MIPI_CSIS0
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#define S5P_PA_MIPI_CSIS1 EXYNOS4_PA_MIPI_CSIS1
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#define S5P_PA_MIPI_CSIS1 EXYNOS4_PA_MIPI_CSIS1
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#define S5P_PA_ONENAND EXYNOS4_PA_ONENAND
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#define S5P_PA_ONENAND EXYNOS4_PA_ONENAND
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