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@@ -2725,7 +2725,8 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
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/* should always can generate irq */
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I915_WRITE(DEIIR, I915_READ(DEIIR));
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I915_WRITE(DEIMR, dev_priv->irq_mask);
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- I915_WRITE(DEIER, display_mask | DE_PIPEA_VBLANK | DE_PIPEB_VBLANK);
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+ I915_WRITE(DEIER, display_mask |
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+ DE_PIPEA_VBLANK | DE_PIPEB_VBLANK | DE_PCU_EVENT);
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POSTING_READ(DEIER);
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dev_priv->gt_irq_mask = ~0;
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@@ -2747,11 +2748,9 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
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ibx_irq_postinstall(dev);
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if (IS_IRONLAKE_M(dev)) {
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- /* Clear & enable PCU event interrupts */
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- I915_WRITE(DEIIR, DE_PCU_EVENT);
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- I915_WRITE(DEIER, I915_READ(DEIER) | DE_PCU_EVENT);
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-
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- /* spinlocking not required here for correctness since interrupt
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+ /* Enable PCU event interrupts
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+ *
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+ * spinlocking not required here for correctness since interrupt
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* setup is guaranteed to run in single-threaded context. But we
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* need it to make the assert_spin_locked happy. */
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spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
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