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@@ -60,69 +60,20 @@ enum pmic_gpio_register {
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#define GPOSW_DOU 0x08
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#define GPOSW_DOU 0x08
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#define GPOSW_RDRV 0x30
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#define GPOSW_RDRV 0x30
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+#define GPIO_UPDATE_TYPE 0x80000000
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#define NUM_GPIO 24
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#define NUM_GPIO 24
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-struct pmic_gpio_irq {
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- spinlock_t lock;
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- u32 trigger[NUM_GPIO];
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- u32 dirty;
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- struct work_struct work;
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-};
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-
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-
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struct pmic_gpio {
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struct pmic_gpio {
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+ struct mutex buslock;
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struct gpio_chip chip;
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struct gpio_chip chip;
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- struct pmic_gpio_irq irqtypes;
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void *gpiointr;
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void *gpiointr;
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int irq;
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int irq;
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unsigned irq_base;
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unsigned irq_base;
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+ unsigned int update_type;
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+ u32 trigger_type;
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};
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};
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-static void pmic_program_irqtype(int gpio, int type)
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-{
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- if (type & IRQ_TYPE_EDGE_RISING)
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- intel_scu_ipc_update_register(GPIO0 + gpio, 0x20, 0x20);
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- else
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- intel_scu_ipc_update_register(GPIO0 + gpio, 0x00, 0x20);
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-
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- if (type & IRQ_TYPE_EDGE_FALLING)
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- intel_scu_ipc_update_register(GPIO0 + gpio, 0x10, 0x10);
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- else
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- intel_scu_ipc_update_register(GPIO0 + gpio, 0x00, 0x10);
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-};
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-
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-static void pmic_irqtype_work(struct work_struct *work)
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-{
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- struct pmic_gpio_irq *t =
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- container_of(work, struct pmic_gpio_irq, work);
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- unsigned long flags;
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- int i;
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- u16 type;
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-
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- spin_lock_irqsave(&t->lock, flags);
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- /* As we drop the lock, we may need multiple scans if we race the
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- pmic_irq_type function */
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- while (t->dirty) {
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- /*
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- * For each pin that has the dirty bit set send an IPC
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- * message to configure the hardware via the PMIC
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- */
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- for (i = 0; i < NUM_GPIO; i++) {
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- if (!(t->dirty & (1 << i)))
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- continue;
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- t->dirty &= ~(1 << i);
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- /* We can't trust the array entry or dirty
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- once the lock is dropped */
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- type = t->trigger[i];
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- spin_unlock_irqrestore(&t->lock, flags);
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- pmic_program_irqtype(i, type);
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- spin_lock_irqsave(&t->lock, flags);
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- }
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- }
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- spin_unlock_irqrestore(&t->lock, flags);
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-}
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-
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static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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{
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{
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if (offset > 8) {
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if (offset > 8) {
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@@ -190,25 +141,24 @@ static void pmic_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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1 << (offset - 16));
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1 << (offset - 16));
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}
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}
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-static int pmic_irq_type(unsigned irq, unsigned type)
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+/*
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+ * This is called from genirq with pg->buslock locked and
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+ * irq_desc->lock held. We can not access the scu bus here, so we
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+ * store the change and update in the bus_sync_unlock() function below
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+ */
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+static int pmic_irq_type(struct irq_data *data, unsigned type)
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{
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{
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- struct pmic_gpio *pg = get_irq_chip_data(irq);
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- u32 gpio = irq - pg->irq_base;
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- unsigned long flags;
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+ struct pmic_gpio *pg = irq_data_get_irq_chip_data(data);
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+ u32 gpio = data->irq - pg->irq_base;
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if (gpio >= pg->chip.ngpio)
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if (gpio >= pg->chip.ngpio)
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return -EINVAL;
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return -EINVAL;
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- spin_lock_irqsave(&pg->irqtypes.lock, flags);
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- pg->irqtypes.trigger[gpio] = type;
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- pg->irqtypes.dirty |= (1 << gpio);
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- spin_unlock_irqrestore(&pg->irqtypes.lock, flags);
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- schedule_work(&pg->irqtypes.work);
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+ pg->trigger_type = type;
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+ pg->update_type = gpio | GPIO_UPDATE_TYPE;
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return 0;
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return 0;
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}
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}
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-
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-
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static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
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static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
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{
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{
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struct pmic_gpio *pg = container_of(chip, struct pmic_gpio, chip);
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struct pmic_gpio *pg = container_of(chip, struct pmic_gpio, chip);
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@@ -217,38 +167,32 @@ static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
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}
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}
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/* the gpiointr register is read-clear, so just do nothing. */
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/* the gpiointr register is read-clear, so just do nothing. */
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-static void pmic_irq_unmask(unsigned irq)
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-{
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-};
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+static void pmic_irq_unmask(struct irq_data *data) { }
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-static void pmic_irq_mask(unsigned irq)
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-{
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-};
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+static void pmic_irq_mask(struct irq_data *data) { }
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static struct irq_chip pmic_irqchip = {
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static struct irq_chip pmic_irqchip = {
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.name = "PMIC-GPIO",
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.name = "PMIC-GPIO",
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- .mask = pmic_irq_mask,
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- .unmask = pmic_irq_unmask,
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- .set_type = pmic_irq_type,
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+ .irq_mask = pmic_irq_mask,
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+ .irq_unmask = pmic_irq_unmask,
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+ .irq_set_type = pmic_irq_type,
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};
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};
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-static void pmic_irq_handler(unsigned irq, struct irq_desc *desc)
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+static irqreturn_t pmic_irq_handler(int irq, void *data)
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{
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{
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- struct pmic_gpio *pg = (struct pmic_gpio *)get_irq_data(irq);
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+ struct pmic_gpio *pg = data;
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u8 intsts = *((u8 *)pg->gpiointr + 4);
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u8 intsts = *((u8 *)pg->gpiointr + 4);
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int gpio;
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int gpio;
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+ irqreturn_t ret = IRQ_NONE;
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for (gpio = 0; gpio < 8; gpio++) {
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for (gpio = 0; gpio < 8; gpio++) {
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if (intsts & (1 << gpio)) {
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if (intsts & (1 << gpio)) {
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pr_debug("pmic pin %d triggered\n", gpio);
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pr_debug("pmic pin %d triggered\n", gpio);
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generic_handle_irq(pg->irq_base + gpio);
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generic_handle_irq(pg->irq_base + gpio);
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+ ret = IRQ_HANDLED;
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}
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}
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}
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}
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-
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- if (desc->chip->irq_eoi)
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- desc->chip->irq_eoi(irq_get_irq_data(irq));
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- else
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- dev_warn(pg->chip.dev, "missing EOI handler for irq %d\n", irq);
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+ return ret;
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}
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}
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static int __devinit platform_pmic_gpio_probe(struct platform_device *pdev)
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static int __devinit platform_pmic_gpio_probe(struct platform_device *pdev)
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@@ -297,8 +241,7 @@ static int __devinit platform_pmic_gpio_probe(struct platform_device *pdev)
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pg->chip.can_sleep = 1;
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pg->chip.can_sleep = 1;
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pg->chip.dev = dev;
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pg->chip.dev = dev;
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- INIT_WORK(&pg->irqtypes.work, pmic_irqtype_work);
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- spin_lock_init(&pg->irqtypes.lock);
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+ mutex_init(&pg->buslock);
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pg->chip.dev = dev;
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pg->chip.dev = dev;
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retval = gpiochip_add(&pg->chip);
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retval = gpiochip_add(&pg->chip);
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@@ -306,8 +249,13 @@ static int __devinit platform_pmic_gpio_probe(struct platform_device *pdev)
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printk(KERN_ERR "%s: Can not add pmic gpio chip.\n", __func__);
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printk(KERN_ERR "%s: Can not add pmic gpio chip.\n", __func__);
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goto err;
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goto err;
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}
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}
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- set_irq_data(pg->irq, pg);
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- set_irq_chained_handler(pg->irq, pmic_irq_handler);
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+
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+ retval = request_irq(pg->irq, pmic_irq_handler, 0, "pmic", pg);
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+ if (retval) {
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+ printk(KERN_WARNING "pmic: Interrupt request failed\n");
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+ goto err;
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+ }
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+
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for (i = 0; i < 8; i++) {
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for (i = 0; i < 8; i++) {
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set_irq_chip_and_handler_name(i + pg->irq_base, &pmic_irqchip,
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set_irq_chip_and_handler_name(i + pg->irq_base, &pmic_irqchip,
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handle_simple_irq, "demux");
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handle_simple_irq, "demux");
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