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[ARM] Merge SMP tree

Russell King 19 years ago
parent
commit
5f8b1178e2
4 changed files with 16 additions and 2 deletions
  1. 1 0
      arch/arm/Makefile
  2. 1 1
      arch/arm/lib/bitops.h
  3. 12 0
      arch/arm/mm/Kconfig
  4. 2 1
      include/asm-arm/mmu_context.h

+ 1 - 0
arch/arm/Makefile

@@ -38,6 +38,7 @@ comma = ,
 # macro, but instead defines a whole series of macros which makes
 # testing for a specific architecture or later rather impossible.
 arch-$(CONFIG_CPU_32v6)		:=-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6,-march=armv5t -Wa$(comma)-march=armv6)
+arch-$(CONFIG_CPU_32v6K)	:=-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6k,-march=armv5t -Wa$(comma)-march=armv6k)
 arch-$(CONFIG_CPU_32v5)		:=-D__LINUX_ARM_ARCH__=5 $(call cc-option,-march=armv5te,-march=armv4)
 arch-$(CONFIG_CPU_32v4)		:=-D__LINUX_ARM_ARCH__=4 -march=armv4
 arch-$(CONFIG_CPU_32v3)		:=-D__LINUX_ARM_ARCH__=3 -march=armv3

+ 1 - 1
arch/arm/lib/bitops.h

@@ -1,6 +1,6 @@
 #include <linux/config.h>
 
-#if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_CPU_MPCORE)
+#if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_CPU_32v6K)
 	.macro	bitop, instr
 	mov	r2, #1
 	and	r3, r0, #7		@ Get bit offset

+ 12 - 0
arch/arm/mm/Kconfig

@@ -250,6 +250,18 @@ config CPU_V6
 	select CPU_COPY_V6
 	select CPU_TLB_V6
 
+# ARMv6k
+config CPU_32v6K
+	bool "Support ARM V6K processor extensions" if !SMP
+	depends on CPU_V6
+	default y if SMP
+	help
+	  Say Y here if your ARMv6 processor supports the 'K' extension.
+	  This enables the kernel to use some instructions not present
+	  on previous processors, and as such a kernel build with this
+	  enabled will not boot on processors with do not support these
+	  instructions.
+
 # Figure out what processor architecture version we should be using.
 # This defines the compiler instruction set which depends on the machine type.
 config CPU_32v3

+ 2 - 1
include/asm-arm/mmu_context.h

@@ -86,7 +86,8 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,
 		cpu_set(cpu, next->cpu_vm_mask);
 		check_context(next);
 		cpu_switch_mm(next->pgd, next);
-		cpu_clear(cpu, prev->cpu_vm_mask);
+		if (cache_is_vivt())
+			cpu_clear(cpu, prev->cpu_vm_mask);
 	}
 }