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@@ -147,15 +147,15 @@ static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name)
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#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
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/**
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* ide_get_or_set_dma_base - setup BMIBA
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- * @d: IDE pci device data
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- * @hwif: Interface
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+ * @d: IDE port info
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+ * @hwif: IDE interface
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*
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* Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space.
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* Where a device has a partner that is already in DMA mode we check
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* and enforce IDE simplex rules.
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*/
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-static unsigned long ide_get_or_set_dma_base(ide_pci_device_t *d, ide_hwif_t *hwif)
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+static unsigned long ide_get_or_set_dma_base(const struct ide_port_info *d, ide_hwif_t *hwif)
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{
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unsigned long dma_base = 0;
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struct pci_dev *dev = hwif->pci_dev;
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@@ -225,10 +225,11 @@ static unsigned long ide_get_or_set_dma_base(ide_pci_device_t *d, ide_hwif_t *hw
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}
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#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
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-void ide_setup_pci_noise (struct pci_dev *dev, ide_pci_device_t *d)
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+void ide_setup_pci_noise(struct pci_dev *dev, const struct ide_port_info *d)
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{
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- printk(KERN_INFO "%s: IDE controller at PCI slot %s\n",
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- d->name, pci_name(dev));
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+ printk(KERN_INFO "%s: IDE controller (0x%04x:0x%04x rev 0x%02x) at "
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+ " PCI slot %s\n", d->name, dev->vendor, dev->device,
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+ dev->revision, pci_name(dev));
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}
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EXPORT_SYMBOL_GPL(ide_setup_pci_noise);
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@@ -237,15 +238,15 @@ EXPORT_SYMBOL_GPL(ide_setup_pci_noise);
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/**
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* ide_pci_enable - do PCI enables
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* @dev: PCI device
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- * @d: IDE pci device data
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+ * @d: IDE port info
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*
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* Enable the IDE PCI device. We attempt to enable the device in full
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* but if that fails then we only need BAR4 so we will enable that.
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*
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* Returns zero on success or an error code
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*/
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-
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-static int ide_pci_enable(struct pci_dev *dev, ide_pci_device_t *d)
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+
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+static int ide_pci_enable(struct pci_dev *dev, const struct ide_port_info *d)
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{
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int ret;
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@@ -260,9 +261,9 @@ static int ide_pci_enable(struct pci_dev *dev, ide_pci_device_t *d)
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}
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/*
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- * assume all devices can do 32-bit dma for now. we can add a
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- * dma mask field to the ide_pci_device_t if we need it (or let
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- * lower level driver set the dma mask)
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+ * assume all devices can do 32-bit DMA for now, we can add
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+ * a DMA mask field to the struct ide_port_info if we need it
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+ * (or let lower level driver set the DMA mask)
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*/
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ret = pci_set_dma_mask(dev, DMA_32BIT_MASK);
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if (ret < 0) {
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@@ -284,13 +285,13 @@ out:
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/**
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* ide_pci_configure - configure an unconfigured device
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* @dev: PCI device
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- * @d: IDE pci device data
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+ * @d: IDE port info
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*
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* Enable and configure the PCI device we have been passed.
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* Returns zero on success or an error code.
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*/
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-
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-static int ide_pci_configure(struct pci_dev *dev, ide_pci_device_t *d)
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+
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+static int ide_pci_configure(struct pci_dev *dev, const struct ide_port_info *d)
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{
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u16 pcicmd = 0;
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/*
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@@ -318,15 +319,15 @@ static int ide_pci_configure(struct pci_dev *dev, ide_pci_device_t *d)
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/**
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* ide_pci_check_iomem - check a register is I/O
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- * @dev: pci device
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- * @d: ide_pci_device
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- * @bar: bar number
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+ * @dev: PCI device
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+ * @d: IDE port info
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+ * @bar: BAR number
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*
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* Checks if a BAR is configured and points to MMIO space. If so
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* print an error and return an error code. Otherwise return 0
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*/
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-
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-static int ide_pci_check_iomem(struct pci_dev *dev, ide_pci_device_t *d, int bar)
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+
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+static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d, int bar)
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{
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ulong flags = pci_resource_flags(dev, bar);
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@@ -348,7 +349,7 @@ static int ide_pci_check_iomem(struct pci_dev *dev, ide_pci_device_t *d, int bar
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/**
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* ide_hwif_configure - configure an IDE interface
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* @dev: PCI device holding interface
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- * @d: IDE pci data
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+ * @d: IDE port info
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* @mate: Paired interface if any
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*
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* Perform the initial set up for the hardware interface structure. This
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@@ -357,8 +358,8 @@ static int ide_pci_check_iomem(struct pci_dev *dev, ide_pci_device_t *d, int bar
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*
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* Returns the new hardware interface structure, or NULL on a failure
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*/
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-
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-static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *mate, int port, int irq)
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+
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+static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, const struct ide_port_info *d, ide_hwif_t *mate, int port, int irq)
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{
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unsigned long ctl = 0, base = 0;
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ide_hwif_t *hwif;
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@@ -387,19 +388,20 @@ static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, ide_pci_device_t *d,
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return NULL; /* no room in ide_hwifs[] */
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if (hwif->io_ports[IDE_DATA_OFFSET] != base ||
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hwif->io_ports[IDE_CONTROL_OFFSET] != (ctl | 2)) {
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- memset(&hwif->hw, 0, sizeof(hwif->hw));
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-#ifndef IDE_ARCH_OBSOLETE_INIT
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- ide_std_init_ports(&hwif->hw, base, (ctl | 2));
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- hwif->hw.io_ports[IDE_IRQ_OFFSET] = 0;
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+ hw_regs_t hw;
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+
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+ memset(&hw, 0, sizeof(hw));
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+#ifndef CONFIG_IDE_ARCH_OBSOLETE_INIT
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+ ide_std_init_ports(&hw, base, ctl | 2);
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#else
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- ide_init_hwif_ports(&hwif->hw, base, (ctl | 2), NULL);
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+ ide_init_hwif_ports(&hw, base, ctl | 2, NULL);
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#endif
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- memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->io_ports));
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+ memcpy(hwif->io_ports, hw.io_ports, sizeof(hwif->io_ports));
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hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET];
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}
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- hwif->chipset = ide_pci;
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+ hwif->chipset = d->chipset ? d->chipset : ide_pci;
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hwif->pci_dev = dev;
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- hwif->cds = (struct ide_pci_device_s *) d;
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+ hwif->cds = d;
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hwif->channel = port;
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if (!hwif->irq)
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@@ -414,21 +416,17 @@ static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, ide_pci_device_t *d,
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/**
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* ide_hwif_setup_dma - configure DMA interface
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* @dev: PCI device
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- * @d: IDE pci data
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- * @hwif: Hardware interface we are configuring
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+ * @d: IDE port info
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+ * @hwif: IDE interface
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*
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* Set up the DMA base for the interface. Enable the master bits as
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* necessary and attempt to bring the device DMA into a ready to use
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* state
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*/
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-
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-#ifndef CONFIG_BLK_DEV_IDEDMA_PCI
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-static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif)
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-{
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-}
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-#else
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-static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif)
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+
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+static void ide_hwif_setup_dma(struct pci_dev *dev, const struct ide_port_info *d, ide_hwif_t *hwif)
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{
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+#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
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u16 pcicmd;
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pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
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@@ -460,13 +458,13 @@ static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwi
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"(BIOS)\n", hwif->name, d->name);
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}
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}
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-}
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#endif /* CONFIG_BLK_DEV_IDEDMA_PCI*/
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+}
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/**
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* ide_setup_pci_controller - set up IDE PCI
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* @dev: PCI device
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- * @d: IDE PCI data
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+ * @d: IDE port info
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* @noisy: verbose flag
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* @config: returned as 1 if we configured the hardware
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*
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@@ -474,8 +472,8 @@ static void ide_hwif_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwi
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* up the PCI side of the device, checks that the device is enabled
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* and enables it if need be
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*/
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-
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-static int ide_setup_pci_controller(struct pci_dev *dev, ide_pci_device_t *d, int noisy, int *config)
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+
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+static int ide_setup_pci_controller(struct pci_dev *dev, const struct ide_port_info *d, int noisy, int *config)
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{
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int ret;
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u16 pcicmd;
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@@ -500,9 +498,6 @@ static int ide_setup_pci_controller(struct pci_dev *dev, ide_pci_device_t *d, in
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printk(KERN_INFO "%s: device enabled (Linux)\n", d->name);
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}
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- if (noisy)
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- printk(KERN_INFO "%s: chipset revision %d\n",
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- d->name, dev->revision);
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out:
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return ret;
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}
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@@ -510,9 +505,9 @@ out:
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/**
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* ide_pci_setup_ports - configure ports/devices on PCI IDE
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* @dev: PCI device
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- * @d: IDE pci device info
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+ * @d: IDE port info
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* @pciirq: IRQ line
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- * @index: ata index to update
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+ * @idx: ATA index table to update
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*
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* Scan the interfaces attached to this device and do any
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* necessary per port setup. Attach the devices and ask the
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@@ -522,26 +517,25 @@ out:
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* but is also used directly as a helper function by some controllers
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* where the chipset setup is not the default PCI IDE one.
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*/
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-
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-void ide_pci_setup_ports(struct pci_dev *dev, ide_pci_device_t *d, int pciirq, ata_index_t *index)
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+
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+void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d, int pciirq, u8 *idx)
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{
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int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port;
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- int at_least_one_hwif_enabled = 0;
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ide_hwif_t *hwif, *mate = NULL;
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u8 tmp;
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- index->all = 0xf0f0;
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-
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/*
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* Set up the IDE ports
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*/
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-
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+
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for (port = 0; port < channels; ++port) {
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- ide_pci_enablebit_t *e = &(d->enablebits[port]);
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-
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+ const ide_pci_enablebit_t *e = &(d->enablebits[port]);
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+
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if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
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- (tmp & e->mask) != e->val))
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+ (tmp & e->mask) != e->val)) {
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+ printk(KERN_INFO "%s: IDE port disabled\n", d->name);
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continue; /* port not enabled */
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+ }
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if ((hwif = ide_hwif_configure(dev, d, mate, port, pciirq)) == NULL)
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continue;
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@@ -549,11 +543,7 @@ void ide_pci_setup_ports(struct pci_dev *dev, ide_pci_device_t *d, int pciirq, a
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/* setup proper ancestral information */
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hwif->gendev.parent = &dev->dev;
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- if (hwif->channel) {
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- index->b.high = hwif->index;
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- } else {
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- index->b.low = hwif->index;
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- }
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+ *(idx + port) = hwif->index;
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if (d->init_iops)
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@@ -562,15 +552,28 @@ void ide_pci_setup_ports(struct pci_dev *dev, ide_pci_device_t *d, int pciirq, a
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if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0)
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ide_hwif_setup_dma(dev, d, hwif);
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- if ((d->host_flags & IDE_HFLAG_LEGACY_IRQS) && hwif->irq == 0)
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+ if ((!hwif->irq && (d->host_flags & IDE_HFLAG_LEGACY_IRQS)) ||
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+ (d->host_flags & IDE_HFLAG_FORCE_LEGACY_IRQS))
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hwif->irq = port ? 15 : 14;
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+ hwif->fixup = d->fixup;
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+
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hwif->host_flags = d->host_flags;
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hwif->pio_mask = d->pio_mask;
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if ((d->host_flags & IDE_HFLAG_SERIALIZE) && hwif->mate)
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hwif->mate->serialized = hwif->serialized = 1;
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+ if (d->host_flags & IDE_HFLAG_IO_32BIT) {
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+ hwif->drives[0].io_32bit = 1;
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+ hwif->drives[1].io_32bit = 1;
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+ }
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+
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+ if (d->host_flags & IDE_HFLAG_UNMASK_IRQS) {
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+ hwif->drives[0].unmask = 1;
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+ hwif->drives[1].unmask = 1;
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+ }
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+
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if (hwif->dma_base) {
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hwif->swdma_mask = d->swdma_mask;
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hwif->mwdma_mask = d->mwdma_mask;
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@@ -580,6 +583,9 @@ void ide_pci_setup_ports(struct pci_dev *dev, ide_pci_device_t *d, int pciirq, a
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hwif->drives[0].autotune = 1;
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hwif->drives[1].autotune = 1;
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+ if (d->host_flags & IDE_HFLAG_RQSIZE_256)
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+ hwif->rqsize = 256;
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+
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if (d->init_hwif)
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/* Call chipset-specific routine
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* for each enabled hwif
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@@ -587,10 +593,7 @@ void ide_pci_setup_ports(struct pci_dev *dev, ide_pci_device_t *d, int pciirq, a
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d->init_hwif(hwif);
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mate = hwif;
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- at_least_one_hwif_enabled = 1;
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}
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- if (!at_least_one_hwif_enabled)
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- printk(KERN_INFO "%s: neither IDE port enabled (BIOS)\n", d->name);
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}
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EXPORT_SYMBOL_GPL(ide_pci_setup_ports);
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@@ -602,13 +605,13 @@ EXPORT_SYMBOL_GPL(ide_pci_setup_ports);
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*
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* One thing that is not standardized is the location of the
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* primary/secondary interface "enable/disable" bits. For chipsets that
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- * we "know" about, this information is in the ide_pci_device_t struct;
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+ * we "know" about, this information is in the struct ide_port_info;
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* for all other chipsets, we just assume both interfaces are enabled.
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*/
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-static int do_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t *d,
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- ata_index_t *index, u8 noisy)
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+static int do_ide_setup_pci_device(struct pci_dev *dev,
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+ const struct ide_port_info *d,
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+ u8 *idx, u8 noisy)
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{
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- static ata_index_t ata_index = { .b = { .low = 0xff, .high = 0xff } };
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int tried_config = 0;
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int pciirq, ret;
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@@ -658,51 +661,35 @@ static int do_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t *d,
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/* FIXME: silent failure can happen */
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- *index = ata_index;
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- ide_pci_setup_ports(dev, d, pciirq, index);
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+ ide_pci_setup_ports(dev, d, pciirq, idx);
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out:
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return ret;
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}
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-int ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t *d)
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+int ide_setup_pci_device(struct pci_dev *dev, const struct ide_port_info *d)
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{
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- ide_hwif_t *hwif = NULL, *mate = NULL;
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- ata_index_t index_list;
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+ u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
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int ret;
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- ret = do_ide_setup_pci_device(dev, d, &index_list, 1);
|
|
|
- if (ret < 0)
|
|
|
- goto out;
|
|
|
+ ret = do_ide_setup_pci_device(dev, d, &idx[0], 1);
|
|
|
|
|
|
- if ((index_list.b.low & 0xf0) != 0xf0)
|
|
|
- hwif = &ide_hwifs[index_list.b.low];
|
|
|
- if ((index_list.b.high & 0xf0) != 0xf0)
|
|
|
- mate = &ide_hwifs[index_list.b.high];
|
|
|
+ if (ret >= 0)
|
|
|
+ ide_device_add(idx);
|
|
|
|
|
|
- if (hwif)
|
|
|
- probe_hwif_init_with_fixup(hwif, d->fixup);
|
|
|
- if (mate)
|
|
|
- probe_hwif_init_with_fixup(mate, d->fixup);
|
|
|
-
|
|
|
- if (hwif)
|
|
|
- ide_proc_register_port(hwif);
|
|
|
- if (mate)
|
|
|
- ide_proc_register_port(mate);
|
|
|
-out:
|
|
|
return ret;
|
|
|
}
|
|
|
|
|
|
EXPORT_SYMBOL_GPL(ide_setup_pci_device);
|
|
|
|
|
|
int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2,
|
|
|
- ide_pci_device_t *d)
|
|
|
+ const struct ide_port_info *d)
|
|
|
{
|
|
|
struct pci_dev *pdev[] = { dev1, dev2 };
|
|
|
- ata_index_t index_list[2];
|
|
|
int ret, i;
|
|
|
+ u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
|
|
|
|
|
|
for (i = 0; i < 2; i++) {
|
|
|
- ret = do_ide_setup_pci_device(pdev[i], d, index_list + i, !i);
|
|
|
+ ret = do_ide_setup_pci_device(pdev[i], d, &idx[i*2], !i);
|
|
|
/*
|
|
|
* FIXME: Mom, mom, they stole me the helper function to undo
|
|
|
* do_ide_setup_pci_device() on the first device!
|
|
@@ -711,25 +698,7 @@ int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2,
|
|
|
goto out;
|
|
|
}
|
|
|
|
|
|
- for (i = 0; i < 2; i++) {
|
|
|
- u8 idx[2] = { index_list[i].b.low, index_list[i].b.high };
|
|
|
- int j;
|
|
|
-
|
|
|
- for (j = 0; j < 2; j++) {
|
|
|
- if ((idx[j] & 0xf0) != 0xf0)
|
|
|
- probe_hwif_init(ide_hwifs + idx[j]);
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- for (i = 0; i < 2; i++) {
|
|
|
- u8 idx[2] = { index_list[i].b.low, index_list[i].b.high };
|
|
|
- int j;
|
|
|
-
|
|
|
- for (j = 0; j < 2; j++) {
|
|
|
- if ((idx[j] & 0xf0) != 0xf0)
|
|
|
- ide_proc_register_port(ide_hwifs + idx[j]);
|
|
|
- }
|
|
|
- }
|
|
|
+ ide_device_add(idx);
|
|
|
out:
|
|
|
return ret;
|
|
|
}
|
|
@@ -754,9 +723,6 @@ static LIST_HEAD(ide_pci_drivers);
|
|
|
* hands the controllers off to the core PCI code to do the rest of
|
|
|
* the work.
|
|
|
*
|
|
|
- * The driver_data of the driver table must point to an ide_pci_device_t
|
|
|
- * describing the interface.
|
|
|
- *
|
|
|
* Returns are the same as for pci_register_driver
|
|
|
*/
|
|
|
|