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@@ -100,6 +100,8 @@
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TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
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#define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
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+#define TMIO_MIN_DMA_LEN 8
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+
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#define enable_mmc_irqs(host, i) \
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do { \
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u32 mask;\
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@@ -147,6 +149,7 @@ struct tmio_mmc_host {
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struct platform_device *pdev;
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/* DMA support */
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+ bool force_pio;
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struct dma_chan *chan_rx;
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struct dma_chan *chan_tx;
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struct tasklet_struct dma_complete;
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@@ -385,6 +388,7 @@ static void tmio_mmc_reset_work(struct work_struct *work)
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host->cmd = NULL;
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host->data = NULL;
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host->mrq = NULL;
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+ host->force_pio = false;
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spin_unlock_irqrestore(&host->lock, flags);
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@@ -404,6 +408,7 @@ tmio_mmc_finish_request(struct tmio_mmc_host *host)
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host->mrq = NULL;
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host->cmd = NULL;
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host->data = NULL;
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+ host->force_pio = false;
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cancel_delayed_work(&host->delayed_reset_work);
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@@ -485,7 +490,7 @@ static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
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unsigned int count;
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unsigned long flags;
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- if (host->chan_tx || host->chan_rx) {
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+ if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
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pr_err("PIO IRQ in DMA mode!\n");
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return;
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} else if (!data) {
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@@ -551,15 +556,11 @@ static void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
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*/
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if (data->flags & MMC_DATA_READ) {
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- if (!host->chan_rx)
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- disable_mmc_irqs(host, TMIO_MASK_READOP);
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- else
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+ if (host->chan_rx && !host->force_pio)
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tmio_check_bounce_buffer(host);
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dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
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host->mrq);
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} else {
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- if (!host->chan_tx)
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- disable_mmc_irqs(host, TMIO_MASK_WRITEOP);
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dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
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host->mrq);
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}
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@@ -583,7 +584,7 @@ static void tmio_mmc_data_irq(struct tmio_mmc_host *host)
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if (!data)
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goto out;
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- if (host->chan_tx && (data->flags & MMC_DATA_WRITE)) {
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+ if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
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/*
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* Has all data been written out yet? Testing on SuperH showed,
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* that in most cases the first interrupt comes already with the
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@@ -596,11 +597,12 @@ static void tmio_mmc_data_irq(struct tmio_mmc_host *host)
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disable_mmc_irqs(host, TMIO_STAT_DATAEND);
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tasklet_schedule(&host->dma_complete);
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}
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- } else if (host->chan_rx && (data->flags & MMC_DATA_READ)) {
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+ } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
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disable_mmc_irqs(host, TMIO_STAT_DATAEND);
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tasklet_schedule(&host->dma_complete);
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} else {
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tmio_mmc_do_data_irq(host);
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+ disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
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}
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out:
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spin_unlock(&host->lock);
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@@ -649,12 +651,12 @@ static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
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*/
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if (host->data && !cmd->error) {
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if (host->data->flags & MMC_DATA_READ) {
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- if (!host->chan_rx)
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+ if (host->force_pio || !host->chan_rx)
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enable_mmc_irqs(host, TMIO_MASK_READOP);
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else
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tasklet_schedule(&host->dma_issue);
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} else {
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- if (!host->chan_tx)
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+ if (host->force_pio || !host->chan_tx)
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enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
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else
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tasklet_schedule(&host->dma_issue);
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@@ -810,6 +812,11 @@ static void tmio_mmc_start_dma_rx(struct tmio_mmc_host *host)
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goto pio;
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}
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+ if (sg->length < TMIO_MIN_DMA_LEN) {
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+ host->force_pio = true;
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+ return;
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+ }
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+
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disable_mmc_irqs(host, TMIO_STAT_RXRDY);
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/* The only sg element can be unaligned, use our bounce buffer then */
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@@ -878,6 +885,11 @@ static void tmio_mmc_start_dma_tx(struct tmio_mmc_host *host)
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goto pio;
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}
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+ if (sg->length < TMIO_MIN_DMA_LEN) {
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+ host->force_pio = true;
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+ return;
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+ }
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+
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disable_mmc_irqs(host, TMIO_STAT_TXRQ);
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/* The only sg element can be unaligned, use our bounce buffer then */
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@@ -1119,6 +1131,7 @@ static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
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fail:
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host->mrq = NULL;
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+ host->force_pio = false;
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mrq->cmd->error = ret;
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mmc_request_done(mmc, mrq);
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}
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