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@@ -1,7 +1,8 @@
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/*
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* arch/arm/mach-at91/include/mach/uncompress.h
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*
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- * Copyright (C) 2003 SAN People
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+ * Copyright (C) 2003 SAN People
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+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@@ -25,32 +26,149 @@
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#include <linux/atmel_serial.h>
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#include <mach/hardware.h>
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-#if defined(CONFIG_AT91_EARLY_DBGU0)
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-#define UART_OFFSET AT91_BASE_DBGU0
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-#elif defined(CONFIG_AT91_EARLY_DBGU1)
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-#define UART_OFFSET AT91_BASE_DBGU1
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-#elif defined(CONFIG_AT91_EARLY_USART0)
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-#define UART_OFFSET AT91_USART0
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-#elif defined(CONFIG_AT91_EARLY_USART1)
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-#define UART_OFFSET AT91_USART1
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-#elif defined(CONFIG_AT91_EARLY_USART2)
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-#define UART_OFFSET AT91_USART2
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-#elif defined(CONFIG_AT91_EARLY_USART3)
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-#define UART_OFFSET AT91_USART3
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-#elif defined(CONFIG_AT91_EARLY_USART4)
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-#define UART_OFFSET AT91_USART4
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-#elif defined(CONFIG_AT91_EARLY_USART5)
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-#define UART_OFFSET AT91_USART5
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-#endif
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+#include <mach/at91_dbgu.h>
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+#include <mach/cpu.h>
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void __iomem *at91_uart;
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+#if !defined(CONFIG_ARCH_AT91X40)
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+static const u32 uarts_rm9200[] = {
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+ AT91_BASE_DBGU0,
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+ AT91RM9200_BASE_US0,
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+ AT91RM9200_BASE_US1,
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+ AT91RM9200_BASE_US2,
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+ AT91RM9200_BASE_US3,
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+ 0,
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+};
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+
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+static const u32 uarts_sam9260[] = {
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+ AT91_BASE_DBGU0,
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+ AT91SAM9260_BASE_US0,
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+ AT91SAM9260_BASE_US1,
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+ AT91SAM9260_BASE_US2,
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+ AT91SAM9260_BASE_US3,
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+ AT91SAM9260_BASE_US4,
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+ AT91SAM9260_BASE_US5,
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+ 0,
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+};
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+
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+static const u32 uarts_sam9261[] = {
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+ AT91_BASE_DBGU0,
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+ AT91SAM9261_BASE_US0,
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+ AT91SAM9261_BASE_US1,
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+ AT91SAM9261_BASE_US2,
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+ 0,
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+};
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+
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+static const u32 uarts_sam9263[] = {
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+ AT91_BASE_DBGU1,
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+ AT91SAM9263_BASE_US0,
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+ AT91SAM9263_BASE_US1,
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+ AT91SAM9263_BASE_US2,
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+ 0,
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+};
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+
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+static const u32 uarts_sam9g45[] = {
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+ AT91_BASE_DBGU1,
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+ AT91SAM9G45_BASE_US0,
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+ AT91SAM9G45_BASE_US1,
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+ AT91SAM9G45_BASE_US2,
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+ AT91SAM9G45_BASE_US3,
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+ 0,
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+};
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+
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+static const u32 uarts_sam9rl[] = {
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+ AT91_BASE_DBGU0,
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+ AT91SAM9RL_BASE_US0,
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+ AT91SAM9RL_BASE_US1,
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+ AT91SAM9RL_BASE_US2,
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+ AT91SAM9RL_BASE_US3,
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+ 0,
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+};
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+
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+static const u32 uarts_sam9x5[] = {
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+ AT91_BASE_DBGU0,
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+ AT91SAM9X5_BASE_USART0,
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+ AT91SAM9X5_BASE_USART1,
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+ AT91SAM9X5_BASE_USART2,
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+ 0,
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+};
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+
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+static inline const u32* decomp_soc_detect(u32 dbgu_base)
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+{
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+ u32 cidr, socid;
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+
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+ cidr = __raw_readl(dbgu_base + AT91_DBGU_CIDR);
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+ socid = cidr & ~AT91_CIDR_VERSION;
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+
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+ switch (socid) {
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+ case ARCH_ID_AT91RM9200:
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+ return uarts_rm9200;
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+
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+ case ARCH_ID_AT91SAM9G20:
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+ case ARCH_ID_AT91SAM9260:
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+ return uarts_sam9260;
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+
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+ case ARCH_ID_AT91SAM9261:
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+ return uarts_sam9261;
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+
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+ case ARCH_ID_AT91SAM9263:
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+ return uarts_sam9263;
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+
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+ case ARCH_ID_AT91SAM9G45:
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+ return uarts_sam9g45;
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+
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+ case ARCH_ID_AT91SAM9RL64:
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+ return uarts_sam9rl;
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+
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+ case ARCH_ID_AT91SAM9X5:
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+ return uarts_sam9x5;
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+ }
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+
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+ /* at91sam9g10 */
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+ if ((cidr & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
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+ return uarts_sam9261;
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+ }
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+ /* at91sam9xe */
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+ else if ((cidr & AT91_CIDR_ARCH) == ARCH_FAMILY_AT91SAM9XE) {
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+ return uarts_sam9260;
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+ }
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+
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+ return NULL;
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+}
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+
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static inline void arch_decomp_setup(void)
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{
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-#ifdef UART_OFFSET
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- at91_uart = (void __iomem *) UART_OFFSET; /* physical address */
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-#endif
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+ int i = 0;
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+ const u32* usarts;
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+
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+ usarts = decomp_soc_detect(AT91_BASE_DBGU0);
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+
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+ if (!usarts)
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+ usarts = decomp_soc_detect(AT91_BASE_DBGU1);
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+ if (!usarts) {
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+ at91_uart = NULL;
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+ return;
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+ }
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+
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+ do {
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+ /* physical address */
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+ at91_uart = (void __iomem *)usarts[i];
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+
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+ if (__raw_readl(at91_uart + ATMEL_US_BRGR))
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+ return;
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+ i++;
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+ } while (usarts[i]);
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+
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+ at91_uart = NULL;
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}
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+#else
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+static inline void arch_decomp_setup(void)
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+{
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+ at91_uart = NULL;
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+}
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+#endif
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+
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/*
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* The following code assumes the serial port has already been
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* initialized by the bootloader. If you didn't setup a port in
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@@ -60,20 +178,22 @@ static inline void arch_decomp_setup(void)
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*/
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static void putc(int c)
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{
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-#ifdef UART_OFFSET
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+ if (!at91_uart)
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+ return;
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+
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while (!(__raw_readl(at91_uart + ATMEL_US_CSR) & ATMEL_US_TXRDY))
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barrier();
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__raw_writel(c, at91_uart + ATMEL_US_THR);
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-#endif
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}
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static inline void flush(void)
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{
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-#ifdef UART_OFFSET
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+ if (!at91_uart)
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+ return;
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+
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/* wait for transmission to complete */
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while (!(__raw_readl(at91_uart + ATMEL_US_CSR) & ATMEL_US_TXEMPTY))
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barrier();
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-#endif
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}
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#define arch_decomp_wdog()
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Jean-Christophe PLAGNIOL-VILLARD