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@@ -48,7 +48,9 @@
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#define ARMADA_370_XP_TIMER0_PER_CPU_IRQ (5)
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-#define ACTIVE_DOORBELLS (8)
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+#define IPI_DOORBELL_START (0)
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+#define IPI_DOORBELL_END (8)
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+#define IPI_DOORBELL_MASK 0xFF
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static DEFINE_RAW_SPINLOCK(irq_controller_lock);
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@@ -192,7 +194,7 @@ void armada_xp_mpic_smp_cpu_init(void)
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writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS);
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/* Enable first 8 IPIs */
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- writel((1 << ACTIVE_DOORBELLS) - 1, per_cpu_int_base +
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+ writel(IPI_DOORBELL_MASK, per_cpu_int_base +
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ARMADA_370_XP_IN_DRBEL_MSK_OFFS);
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/* Unmask IPI interrupt */
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@@ -231,13 +233,14 @@ armada_370_xp_handle_irq(struct pt_regs *regs)
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ipimask = readl_relaxed(per_cpu_int_base +
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ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS)
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- & 0xFF;
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+ & IPI_DOORBELL_MASK;
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- writel(0x0, per_cpu_int_base +
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+ writel(~IPI_DOORBELL_MASK, per_cpu_int_base +
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ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS);
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/* Handle all pending doorbells */
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- for (ipinr = 0; ipinr < ACTIVE_DOORBELLS; ipinr++) {
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+ for (ipinr = IPI_DOORBELL_START;
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+ ipinr < IPI_DOORBELL_END; ipinr++) {
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if (ipimask & (0x1 << ipinr))
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handle_IPI(ipinr, regs);
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}
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