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@@ -110,6 +110,8 @@
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#define OMAP24XX_GPIO_LEVELDETECT1 0x0044
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#define OMAP24XX_GPIO_RISINGDETECT 0x0048
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#define OMAP24XX_GPIO_FALLINGDETECT 0x004c
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+#define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050
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+#define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054
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#define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060
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#define OMAP24XX_GPIO_SETIRQENABLE1 0x0064
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#define OMAP24XX_GPIO_CLEARWKUENA 0x0080
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@@ -463,8 +465,50 @@ do { \
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__raw_writel(l, base + reg); \
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} while(0)
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+void omap_set_gpio_debounce(int gpio, int enable)
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+{
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+ struct gpio_bank *bank;
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+ void __iomem *reg;
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+ u32 val, l = 1 << get_gpio_index(gpio);
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+
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+ if (cpu_class_is_omap1())
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+ return;
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+
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+ bank = get_gpio_bank(gpio);
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+ reg = bank->base;
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+
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+ reg += OMAP24XX_GPIO_DEBOUNCE_EN;
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+ val = __raw_readl(reg);
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+
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+ if (enable)
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+ val |= l;
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+ else
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+ val &= ~l;
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+
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+ __raw_writel(val, reg);
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+}
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+EXPORT_SYMBOL(omap_set_gpio_debounce);
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+
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+void omap_set_gpio_debounce_time(int gpio, int enc_time)
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+{
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+ struct gpio_bank *bank;
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+ void __iomem *reg;
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+
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+ if (cpu_class_is_omap1())
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+ return;
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+
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+ bank = get_gpio_bank(gpio);
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+ reg = bank->base;
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+
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+ enc_time &= 0xff;
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+ reg += OMAP24XX_GPIO_DEBOUNCE_VAL;
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+ __raw_writel(enc_time, reg);
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+}
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+EXPORT_SYMBOL(omap_set_gpio_debounce_time);
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+
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#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
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-static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
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+static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
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+ int trigger)
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{
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void __iomem *base = bank->base;
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u32 gpio_bit = 1 << gpio;
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@@ -477,19 +521,25 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, in
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trigger & __IRQT_RISEDGE);
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MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
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trigger & __IRQT_FALEDGE);
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+
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if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
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if (trigger != 0)
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- __raw_writel(1 << gpio, bank->base + OMAP24XX_GPIO_SETWKUENA);
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+ __raw_writel(1 << gpio, bank->base
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+ + OMAP24XX_GPIO_SETWKUENA);
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else
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- __raw_writel(1 << gpio, bank->base + OMAP24XX_GPIO_CLEARWKUENA);
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+ __raw_writel(1 << gpio, bank->base
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+ + OMAP24XX_GPIO_CLEARWKUENA);
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} else {
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if (trigger != 0)
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bank->enabled_non_wakeup_gpios |= gpio_bit;
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else
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bank->enabled_non_wakeup_gpios &= ~gpio_bit;
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}
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- /* FIXME: Possibly do 'set_irq_handler(j, handle_level_irq)' if only level
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- * triggering requested. */
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+
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+ /*
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+ * FIXME: Possibly do 'set_irq_handler(j, handle_level_irq)' if only
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+ * level triggering requested.
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+ */
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}
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#endif
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