Browse Source

[PATCH] i386/x86-64 disable LAPIC completely for offline CPU

Disabling LAPIC timer isn't sufficient.  In some situations, such as we
enabled NMI watchdog, there is still unexpected interrupt (such as NMI)
invoked in offline CPU.  This also avoids offline CPU receives spurious
interrupt and anything similar.

Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Acked-by: "Seth, Rohit" <rohit.seth@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Shaohua Li 19 years ago
parent
commit
5e9ef02ec0
2 changed files with 2 additions and 3 deletions
  1. 1 2
      arch/i386/kernel/smpboot.c
  2. 1 1
      arch/x86_64/kernel/smpboot.c

+ 1 - 2
arch/i386/kernel/smpboot.c

@@ -1338,8 +1338,7 @@ int __cpu_disable(void)
 	if (cpu == 0)
 		return -EBUSY;
 
-	/* We enable the timer again on the exit path of the death loop */
-	disable_APIC_timer();
+	clear_local_APIC();
 	/* Allow any queued timer interrupts to get serviced */
 	local_irq_enable();
 	mdelay(1);

+ 1 - 1
arch/x86_64/kernel/smpboot.c

@@ -1181,7 +1181,7 @@ int __cpu_disable(void)
 	if (cpu == 0)
 		return -EBUSY;
 
-	disable_APIC_timer();
+	clear_local_APIC();
 
 	/*
 	 * HACK: