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@@ -626,6 +626,44 @@ static void set_cyc2ns_scale(unsigned long cpu_khz, int cpu)
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local_irq_restore(flags);
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}
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+static unsigned long long cyc2ns_suspend;
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+
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+void save_sched_clock_state(void)
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+{
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+ if (!sched_clock_stable)
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+ return;
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+
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+ cyc2ns_suspend = sched_clock();
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+}
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+
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+/*
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+ * Even on processors with invariant TSC, TSC gets reset in some the
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+ * ACPI system sleep states. And in some systems BIOS seem to reinit TSC to
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+ * arbitrary value (still sync'd across cpu's) during resume from such sleep
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+ * states. To cope up with this, recompute the cyc2ns_offset for each cpu so
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+ * that sched_clock() continues from the point where it was left off during
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+ * suspend.
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+ */
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+void restore_sched_clock_state(void)
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+{
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+ unsigned long long offset;
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+ unsigned long flags;
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+ int cpu;
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+
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+ if (!sched_clock_stable)
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+ return;
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+
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+ local_irq_save(flags);
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+
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+ get_cpu_var(cyc2ns_offset) = 0;
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+ offset = cyc2ns_suspend - sched_clock();
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+
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+ for_each_possible_cpu(cpu)
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+ per_cpu(cyc2ns_offset, cpu) = offset;
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+
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+ local_irq_restore(flags);
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+}
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+
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#ifdef CONFIG_CPU_FREQ
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/* Frequency scaling support. Adjust the TSC based timer when the cpu frequency
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