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@@ -171,7 +171,6 @@ static struct ata_port_operations pdc2027x_pata100_ops = {
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.post_internal_cmd = ata_bmdma_post_internal_cmd,
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.cable_detect = pdc2027x_cable_detect,
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- .irq_handler = ata_interrupt,
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.irq_clear = ata_bmdma_irq_clear,
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.irq_on = ata_irq_on,
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.irq_ack = ata_irq_ack,
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@@ -207,7 +206,6 @@ static struct ata_port_operations pdc2027x_pata133_ops = {
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.post_internal_cmd = ata_bmdma_post_internal_cmd,
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.cable_detect = pdc2027x_cable_detect,
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- .irq_handler = ata_interrupt,
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.irq_clear = ata_bmdma_irq_clear,
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.irq_on = ata_irq_on,
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.irq_ack = ata_irq_ack,
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@@ -218,7 +216,6 @@ static struct ata_port_operations pdc2027x_pata133_ops = {
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static struct ata_port_info pdc2027x_port_info[] = {
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/* PDC_UDMA_100 */
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{
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- .sht = &pdc2027x_sht,
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.flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_SLAVE_POSS |
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ATA_FLAG_MMIO,
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.pio_mask = 0x1f, /* pio0-4 */
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@@ -228,7 +225,6 @@ static struct ata_port_info pdc2027x_port_info[] = {
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},
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/* PDC_UDMA_133 */
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{
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- .sht = &pdc2027x_sht,
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.flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_SLAVE_POSS |
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ATA_FLAG_MMIO,
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.pio_mask = 0x1f, /* pio0-4 */
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@@ -555,12 +551,12 @@ static int pdc2027x_check_atapi_dma(struct ata_queued_cmd *qc)
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/**
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* pdc_read_counter - Read the ctr counter
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- * @probe_ent: for the port address
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+ * @host: target ATA host
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*/
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-static long pdc_read_counter(struct ata_probe_ent *probe_ent)
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+static long pdc_read_counter(struct ata_host *host)
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{
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- void __iomem *mmio_base = probe_ent->iomap[PDC_MMIO_BAR];
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+ void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR];
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long counter;
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int retry = 1;
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u32 bccrl, bccrh, bccrlv, bccrhv;
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@@ -598,12 +594,12 @@ retry:
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* adjust_pll - Adjust the PLL input clock in Hz.
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*
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* @pdc_controller: controller specific information
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- * @probe_ent: For the port address
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+ * @host: target ATA host
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* @pll_clock: The input of PLL in HZ
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*/
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-static void pdc_adjust_pll(struct ata_probe_ent *probe_ent, long pll_clock, unsigned int board_idx)
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+static void pdc_adjust_pll(struct ata_host *host, long pll_clock, unsigned int board_idx)
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{
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- void __iomem *mmio_base = probe_ent->iomap[PDC_MMIO_BAR];
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+ void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR];
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u16 pll_ctl;
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long pll_clock_khz = pll_clock / 1000;
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long pout_required = board_idx? PDC_133_MHZ:PDC_100_MHZ;
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@@ -683,19 +679,19 @@ static void pdc_adjust_pll(struct ata_probe_ent *probe_ent, long pll_clock, unsi
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/**
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* detect_pll_input_clock - Detect the PLL input clock in Hz.
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- * @probe_ent: for the port address
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+ * @host: target ATA host
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* Ex. 16949000 on 33MHz PCI bus for pdc20275.
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* Half of the PCI clock.
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*/
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-static long pdc_detect_pll_input_clock(struct ata_probe_ent *probe_ent)
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+static long pdc_detect_pll_input_clock(struct ata_host *host)
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{
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- void __iomem *mmio_base = probe_ent->iomap[PDC_MMIO_BAR];
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+ void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR];
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u32 scr;
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long start_count, end_count;
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long pll_clock;
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/* Read current counter value */
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- start_count = pdc_read_counter(probe_ent);
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+ start_count = pdc_read_counter(host);
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/* Start the test mode */
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scr = readl(mmio_base + PDC_SYS_CTL);
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@@ -707,7 +703,7 @@ static long pdc_detect_pll_input_clock(struct ata_probe_ent *probe_ent)
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mdelay(100);
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/* Read the counter values again */
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- end_count = pdc_read_counter(probe_ent);
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+ end_count = pdc_read_counter(host);
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/* Stop the test mode */
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scr = readl(mmio_base + PDC_SYS_CTL);
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@@ -726,11 +722,10 @@ static long pdc_detect_pll_input_clock(struct ata_probe_ent *probe_ent)
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/**
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* pdc_hardware_init - Initialize the hardware.
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- * @pdev: instance of pci_dev found
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- * @pdc_controller: controller specific information
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- * @pe: for the port address
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+ * @host: target ATA host
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+ * @board_idx: board identifier
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*/
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-static int pdc_hardware_init(struct pci_dev *pdev, struct ata_probe_ent *pe, unsigned int board_idx)
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+static int pdc_hardware_init(struct ata_host *host, unsigned int board_idx)
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{
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long pll_clock;
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@@ -740,15 +735,15 @@ static int pdc_hardware_init(struct pci_dev *pdev, struct ata_probe_ent *pe, uns
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* Ex. 25MHz or 40MHz, we have to adjust the cycle_time.
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* The pdc20275 controller employs PLL circuit to help correct timing registers setting.
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*/
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- pll_clock = pdc_detect_pll_input_clock(pe);
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+ pll_clock = pdc_detect_pll_input_clock(host);
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if (pll_clock < 0) /* counter overflow? Try again. */
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- pll_clock = pdc_detect_pll_input_clock(pe);
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+ pll_clock = pdc_detect_pll_input_clock(host);
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- dev_printk(KERN_INFO, &pdev->dev, "PLL input clock %ld kHz\n", pll_clock/1000);
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+ dev_printk(KERN_INFO, host->dev, "PLL input clock %ld kHz\n", pll_clock/1000);
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/* Adjust PLL control register */
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- pdc_adjust_pll(pe, pll_clock, board_idx);
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+ pdc_adjust_pll(host, pll_clock, board_idx);
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return 0;
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}
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@@ -780,8 +775,7 @@ static void pdc_ata_setup_port(struct ata_ioports *port, void __iomem *base)
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* Called when an instance of PCI adapter is inserted.
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* This function checks whether the hardware is supported,
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* initialize hardware and register an instance of ata_host to
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- * libata by providing struct ata_probe_ent and ata_device_add().
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- * (implements struct pci_driver.probe() )
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+ * libata. (implements struct pci_driver.probe() )
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*
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* @pdev: instance of pci_dev found
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* @ent: matching entry in the id_tbl[]
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@@ -790,14 +784,21 @@ static int __devinit pdc2027x_init_one(struct pci_dev *pdev, const struct pci_de
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{
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static int printed_version;
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unsigned int board_idx = (unsigned int) ent->driver_data;
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-
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- struct ata_probe_ent *probe_ent;
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+ const struct ata_port_info *ppi[] =
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+ { &pdc2027x_port_info[board_idx], NULL };
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+ struct ata_host *host;
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void __iomem *mmio_base;
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int rc;
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if (!printed_version++)
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dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
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+ /* alloc host */
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+ host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
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+ if (!host)
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+ return -ENOMEM;
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+
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+ /* acquire resources and fill host */
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rc = pcim_enable_device(pdev);
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if (rc)
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return rc;
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@@ -805,6 +806,7 @@ static int __devinit pdc2027x_init_one(struct pci_dev *pdev, const struct pci_de
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rc = pcim_iomap_regions(pdev, 1 << PDC_MMIO_BAR, DRV_NAME);
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if (rc)
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return rc;
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+ host->iomap = pcim_iomap_table(pdev);
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rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
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if (rc)
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@@ -814,46 +816,22 @@ static int __devinit pdc2027x_init_one(struct pci_dev *pdev, const struct pci_de
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if (rc)
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return rc;
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- /* Prepare the probe entry */
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- probe_ent = devm_kzalloc(&pdev->dev, sizeof(*probe_ent), GFP_KERNEL);
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- if (probe_ent == NULL)
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- return -ENOMEM;
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-
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- probe_ent->dev = pci_dev_to_dev(pdev);
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- INIT_LIST_HEAD(&probe_ent->node);
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-
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- probe_ent->sht = pdc2027x_port_info[board_idx].sht;
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- probe_ent->port_flags = pdc2027x_port_info[board_idx].flags;
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- probe_ent->pio_mask = pdc2027x_port_info[board_idx].pio_mask;
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- probe_ent->mwdma_mask = pdc2027x_port_info[board_idx].mwdma_mask;
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- probe_ent->udma_mask = pdc2027x_port_info[board_idx].udma_mask;
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- probe_ent->port_ops = pdc2027x_port_info[board_idx].port_ops;
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+ mmio_base = host->iomap[PDC_MMIO_BAR];
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- probe_ent->irq = pdev->irq;
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- probe_ent->irq_flags = IRQF_SHARED;
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- probe_ent->iomap = pcim_iomap_table(pdev);
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+ pdc_ata_setup_port(&host->ports[0]->ioaddr, mmio_base + 0x17c0);
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+ host->ports[0]->ioaddr.bmdma_addr = mmio_base + 0x1000;
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+ pdc_ata_setup_port(&host->ports[1]->ioaddr, mmio_base + 0x15c0);
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+ host->ports[1]->ioaddr.bmdma_addr = mmio_base + 0x1008;
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- mmio_base = probe_ent->iomap[PDC_MMIO_BAR];
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-
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- pdc_ata_setup_port(&probe_ent->port[0], mmio_base + 0x17c0);
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- probe_ent->port[0].bmdma_addr = mmio_base + 0x1000;
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- pdc_ata_setup_port(&probe_ent->port[1], mmio_base + 0x15c0);
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- probe_ent->port[1].bmdma_addr = mmio_base + 0x1008;
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-
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- probe_ent->n_ports = 2;
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-
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- pci_set_master(pdev);
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//pci_enable_intx(pdev);
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/* initialize adapter */
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- if (pdc_hardware_init(pdev, probe_ent, board_idx) != 0)
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+ if (pdc_hardware_init(host, board_idx) != 0)
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return -EIO;
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- if (!ata_device_add(probe_ent))
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- return -ENODEV;
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-
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- devm_kfree(&pdev->dev, probe_ent);
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- return 0;
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+ pci_set_master(pdev);
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+ return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED,
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+ &pdc2027x_sht);
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}
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/**
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