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@@ -394,7 +394,7 @@ iosapic_startup_level_irq (unsigned int irq)
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}
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static void
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-iosapic_end_level_irq (unsigned int irq)
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+iosapic_unmask_level_irq (unsigned int irq)
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{
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ia64_vector vec = irq_to_vector(irq);
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struct iosapic_rte_info *rte;
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@@ -404,7 +404,8 @@ iosapic_end_level_irq (unsigned int irq)
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if (unlikely(irq_desc[irq].status & IRQ_MOVE_PENDING)) {
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do_unmask_irq = 1;
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mask_irq(irq);
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- }
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+ } else
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+ unmask_irq(irq);
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list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list)
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iosapic_eoi(rte->iosapic->addr, vec);
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@@ -427,9 +428,8 @@ static struct irq_chip irq_type_iosapic_level = {
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.enable = iosapic_enable_level_irq,
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.disable = iosapic_disable_level_irq,
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.ack = iosapic_ack_level_irq,
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- .end = iosapic_end_level_irq,
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.mask = mask_irq,
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- .unmask = unmask_irq,
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+ .unmask = iosapic_unmask_level_irq,
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.set_affinity = iosapic_set_affinity
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};
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@@ -658,6 +658,10 @@ register_intr (unsigned int gsi, int irq, unsigned char delivery,
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idesc->chip->name, irq_type->name);
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idesc->chip = irq_type;
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}
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+ if (trigger == IOSAPIC_EDGE)
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+ __set_irq_handler_unlocked(irq, handle_edge_irq);
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+ else
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+ __set_irq_handler_unlocked(irq, handle_level_irq);
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return 0;
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}
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