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@@ -488,7 +488,7 @@ struct port_feat_cfg { /* port 0: 0x454 port 1: 0x4c8 */
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/****************************************************************************
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/****************************************************************************
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* Device Information *
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* Device Information *
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****************************************************************************/
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****************************************************************************/
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-struct dev_info { /* size */
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+struct shm_dev_info { /* size */
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u32 bc_rev; /* 8 bits each: major, minor, build */ /* 4 */
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u32 bc_rev; /* 8 bits each: major, minor, build */ /* 4 */
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@@ -841,7 +841,7 @@ struct shmem_region { /* SharedMem Offset (size) */
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#define SHR_MEM_VALIDITY_ACTIVE_MFW_NONE 0x000001c0
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#define SHR_MEM_VALIDITY_ACTIVE_MFW_NONE 0x000001c0
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#define SHR_MEM_VALIDITY_ACTIVE_MFW_MASK 0x000001c0
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#define SHR_MEM_VALIDITY_ACTIVE_MFW_MASK 0x000001c0
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- struct dev_info dev_info; /* 0x8 (0x438) */
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+ struct shm_dev_info dev_info; /* 0x8 (0x438) */
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u8 reserved[52*PORT_MAX];
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u8 reserved[52*PORT_MAX];
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