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+/* linux/arch/arm/mach-s3c6410/setup-sdhci.c
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+ *
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+ * Copyright 2008 Simtec Electronics
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+ * Copyright 2008 Simtec Electronics
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+ * Ben Dooks <ben@simtec.co.uk>
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+ * http://armlinux.simtec.co.uk/
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+ *
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+ * S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+*/
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+
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+#include <linux/kernel.h>
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+#include <linux/types.h>
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+#include <linux/interrupt.h>
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+#include <linux/platform_device.h>
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+#include <linux/io.h>
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+
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+#include <linux/mmc/card.h>
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+#include <linux/mmc/host.h>
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+
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+#include <mach/gpio.h>
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+#include <plat/gpio-cfg.h>
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+#include <plat/regs-sdhci.h>
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+#include <plat/sdhci.h>
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+
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+/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
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+
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+char *s3c6410_hsmmc_clksrcs[4] = {
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+ [0] = "hsmmc",
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+ [1] = "hsmmc",
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+ [2] = "mmc_bus",
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+ /* [3] = "48m", - note not succesfully used yet */
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+};
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+
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+void s3c6410_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
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+{
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+ unsigned int gpio;
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+ unsigned int end;
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+
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+ end = S3C64XX_GPG(2 + width);
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+
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+ /* Set all the necessary GPG pins to special-function 0 */
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+ for (gpio = S3C64XX_GPG(0); gpio < end; gpio++) {
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+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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+ }
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+
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+ s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);
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+ s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(2));
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+}
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+
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+void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev,
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+ void __iomem *r,
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+ struct mmc_ios *ios,
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+ struct mmc_card *card)
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+{
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+ u32 ctrl2, ctrl3;
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+
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+ /* don't need to alter anything acording to card-type */
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+
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+ writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
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+
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+ ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
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+ ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
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+ ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
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+ S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
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+ S3C_SDHCI_CTRL2_ENFBCLKRX |
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+ S3C_SDHCI_CTRL2_DFCNT_NONE |
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+ S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
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+
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+ if (ios->clock < 25 * 1000000)
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+ ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
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+ S3C_SDHCI_CTRL3_FCSEL2 |
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+ S3C_SDHCI_CTRL3_FCSEL1 |
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+ S3C_SDHCI_CTRL3_FCSEL0);
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+ else
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+ ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
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+
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+ printk(KERN_INFO "%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3);
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+ writel(ctrl2, r + S3C_SDHCI_CONTROL2);
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+ writel(ctrl3, r + S3C_SDHCI_CONTROL3);
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+}
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+
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+void s3c6410_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
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+{
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+ unsigned int gpio;
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+ unsigned int end;
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+
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+ end = S3C64XX_GPH(2 + width);
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+
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+ /* Set all the necessary GPG pins to special-function 0 */
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+ for (gpio = S3C64XX_GPH(0); gpio < end; gpio++) {
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+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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+ }
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+
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+ s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);
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+ s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3));
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+}
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