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@@ -225,14 +225,6 @@ static void clear_IO_APIC (void)
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clear_IO_APIC_pin(apic, pin);
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}
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-/*
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- * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to
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- * specific CPU-side IRQs.
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- */
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-
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-#define MAX_PIRQS 8
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-static int pirq_entries [MAX_PIRQS];
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-static int pirqs_enabled;
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int skip_ioapic_setup;
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int ioapic_force;
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@@ -370,34 +362,6 @@ void __init check_ioapic(void)
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}
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}
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-static int __init ioapic_pirq_setup(char *str)
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-{
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- int i, max;
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- int ints[MAX_PIRQS+1];
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-
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- get_options(str, ARRAY_SIZE(ints), ints);
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-
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- for (i = 0; i < MAX_PIRQS; i++)
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- pirq_entries[i] = -1;
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-
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- pirqs_enabled = 1;
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- apic_printk(APIC_VERBOSE, "PIRQ redirection, working around broken MP-BIOS.\n");
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- max = MAX_PIRQS;
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- if (ints[0] < MAX_PIRQS)
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- max = ints[0];
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-
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- for (i = 0; i < max; i++) {
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- apic_printk(APIC_VERBOSE, "... PIRQ%d -> IRQ %d\n", i, ints[i+1]);
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- /*
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- * PIRQs are mapped upside down, usually.
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- */
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- pirq_entries[MAX_PIRQS-i-1] = ints[i+1];
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- }
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- return 1;
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-}
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-
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-__setup("pirq=", ioapic_pirq_setup);
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-
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/*
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* Find the IRQ entry number of a certain pin.
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*/
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@@ -793,22 +757,6 @@ static int pin_2_irq(int idx, int apic, int pin)
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}
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}
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BUG_ON(irq >= NR_IRQS);
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-
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- /*
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- * PCI IRQ command line redirection. Yes, limits are hardcoded.
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- */
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- if ((pin >= 16) && (pin <= 23)) {
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- if (pirq_entries[pin-16] != -1) {
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- if (!pirq_entries[pin-16]) {
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- apic_printk(APIC_VERBOSE, "disabling PIRQ%d\n", pin-16);
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- } else {
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- irq = pirq_entries[pin-16];
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- apic_printk(APIC_VERBOSE, "using PIRQ%d -> IRQ %d\n",
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- pin-16, irq);
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- }
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- }
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- }
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- BUG_ON(irq >= NR_IRQS);
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return irq;
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}
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@@ -1281,9 +1229,6 @@ static void __init enable_IO_APIC(void)
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irq_2_pin[i].pin = -1;
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irq_2_pin[i].next = 0;
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}
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- if (!pirqs_enabled)
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- for (i = 0; i < MAX_PIRQS; i++)
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- pirq_entries[i] = -1;
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/*
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* The number of IO-APIC IRQ registers (== #pins):
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