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@@ -70,12 +70,10 @@ arch_teardown_msi_irqs(struct pci_dev *dev)
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}
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}
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}
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}
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-static void msi_set_enable(struct pci_dev *dev, int enable)
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+static void __msi_set_enable(struct pci_dev *dev, int pos, int enable)
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{
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{
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- int pos;
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u16 control;
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u16 control;
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- pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
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if (pos) {
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if (pos) {
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pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
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pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
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control &= ~PCI_MSI_FLAGS_ENABLE;
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control &= ~PCI_MSI_FLAGS_ENABLE;
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@@ -85,6 +83,11 @@ static void msi_set_enable(struct pci_dev *dev, int enable)
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}
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}
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}
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}
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+static void msi_set_enable(struct pci_dev *dev, int enable)
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+{
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+ __msi_set_enable(dev, pci_find_capability(dev, PCI_CAP_ID_MSI), enable);
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+}
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+
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static void msix_set_enable(struct pci_dev *dev, int enable)
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static void msix_set_enable(struct pci_dev *dev, int enable)
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{
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{
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int pos;
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int pos;
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@@ -141,7 +144,8 @@ static void msi_set_mask_bits(unsigned int irq, u32 mask, u32 flag)
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mask_bits |= flag & mask;
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mask_bits |= flag & mask;
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pci_write_config_dword(entry->dev, pos, mask_bits);
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pci_write_config_dword(entry->dev, pos, mask_bits);
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} else {
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} else {
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- msi_set_enable(entry->dev, !flag);
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+ __msi_set_enable(entry->dev, entry->msi_attrib.pos,
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+ !flag);
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}
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}
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break;
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break;
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case PCI_CAP_ID_MSIX:
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case PCI_CAP_ID_MSIX:
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