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@@ -70,6 +70,11 @@ static unsigned long pxa_gettimeoffset (void)
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return usec;
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}
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+#ifdef CONFIG_NO_IDLE_HZ
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+static unsigned long initial_match;
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+static int match_posponed;
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+#endif
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+
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static irqreturn_t
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pxa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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@@ -77,6 +82,13 @@ pxa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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write_seqlock(&xtime_lock);
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+#ifdef CONFIG_NO_IDLE_HZ
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+ if (match_posponed) {
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+ match_posponed = 0;
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+ OSMR0 = initial_match;
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+ }
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+#endif
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+
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/* Loop until we get ahead of the free running timer.
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* This ensures an exact clock tick count and time accuracy.
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* IRQs are disabled inside the loop to ensure coherence between
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@@ -126,6 +138,42 @@ static void __init pxa_timer_init(void)
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OSCR = 0; /* initialize free-running timer, force first match */
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}
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+#ifdef CONFIG_NO_IDLE_HZ
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+static int pxa_dyn_tick_enable_disable(void)
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+{
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+ /* nothing to do */
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+ return 0;
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+}
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+
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+static void pxa_dyn_tick_reprogram(unsigned long ticks)
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+{
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+ if (ticks > 1) {
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+ initial_match = OSMR0;
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+ OSMR0 = initial_match + ticks * LATCH;
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+ match_posponed = 1;
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+ }
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+}
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+
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+static irqreturn_t
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+pxa_dyn_tick_handler(int irq, void *dev_id, struct pt_regs *regs)
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+{
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+ if (match_posponed) {
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+ match_posponed = 0;
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+ OSMR0 = initial_match;
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+ if ( (signed long)(initial_match - OSCR) <= 8 )
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+ return pxa_timer_interrupt(irq, dev_id, regs);
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+ }
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+ return IRQ_NONE;
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+}
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+
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+static struct dyn_tick_timer pxa_dyn_tick = {
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+ .enable = pxa_dyn_tick_enable_disable,
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+ .disable = pxa_dyn_tick_enable_disable,
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+ .reprogram = pxa_dyn_tick_reprogram,
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+ .handler = pxa_dyn_tick_handler,
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+};
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+#endif
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+
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#ifdef CONFIG_PM
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static unsigned long osmr[4], oier;
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@@ -161,4 +209,7 @@ struct sys_timer pxa_timer = {
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.suspend = pxa_timer_suspend,
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.resume = pxa_timer_resume,
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.offset = pxa_gettimeoffset,
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+#ifdef CONFIG_NO_IDLE_HZ
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+ .dyn_tick = &pxa_dyn_tick,
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+#endif
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};
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