drm/nouveau: quiet some static-related sparse noise

Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/core/core/gpuobj.c

@@ -139,7 +139,7 @@ struct nouveau_gpuobj_class {
 	u32 flags;
 };
 
-int
+static int
 _nouveau_gpuobj_ctor(struct nouveau_object *parent,
 		     struct nouveau_object *engine,
 		     struct nouveau_oclass *oclass, void *data, u32 size,

drivers/gpu/drm/nouveau/core/core/object.c

@@ -61,7 +61,7 @@ nouveau_object_create_(struct nouveau_object *parent,
 	return 0;
 }
 
-int
+static int
 _nouveau_object_ctor(struct nouveau_object *parent,
 		     struct nouveau_object *engine,
 		     struct nouveau_oclass *oclass, void *data, u32 size,
@@ -91,7 +91,7 @@ nouveau_object_destroy(struct nouveau_object *object)
 	kfree(object);
 }
 
-void
+static void
 _nouveau_object_dtor(struct nouveau_object *object)
 {
 	nouveau_object_destroy(object);
@@ -103,7 +103,7 @@ nouveau_object_init(struct nouveau_object *object)
 	return 0;
 }
 
-int
+static int
 _nouveau_object_init(struct nouveau_object *object)
 {
 	return nouveau_object_init(object);
@@ -115,7 +115,7 @@ nouveau_object_fini(struct nouveau_object *object, bool suspend)
 	return 0;
 }
 
-int
+static int
 _nouveau_object_fini(struct nouveau_object *object, bool suspend)
 {
 	return nouveau_object_fini(object, suspend);

drivers/gpu/drm/nouveau/core/core/option.c

@@ -22,7 +22,7 @@
  * Authors: Ben Skeggs
  */
 
-#include <core/os.h>
+#include <core/option.h>
 #include <core/debug.h>
 
 /* compares unterminated string 'str' with zero-terminated string 'cmp' */

drivers/gpu/drm/nouveau/core/engine/copy/fuc/nva3.fuc.h

@@ -1,4 +1,4 @@
-u32 nva3_pcopy_data[] = {
+static u32 nva3_pcopy_data[] = {
 /* 0x0000: ctx_object */
 	0x00000000,
 /* 0x0004: ctx_dma */
@@ -183,7 +183,7 @@ u32 nva3_pcopy_data[] = {
 	0x00000800,
 };
 
-u32 nva3_pcopy_code[] = {
+static u32 nva3_pcopy_code[] = {
 /* 0x0000: main */
 	0x04fe04bd,
 	0x3517f000,

drivers/gpu/drm/nouveau/core/engine/copy/fuc/nvc0.fuc.h

@@ -1,4 +1,4 @@
-u32 nvc0_pcopy_data[] = {
+static u32 nvc0_pcopy_data[] = {
 /* 0x0000: ctx_object */
 	0x00000000,
 /* 0x0004: ctx_query_address_high */
@@ -171,7 +171,7 @@ u32 nvc0_pcopy_data[] = {
 	0x00000800,
 };
 
-u32 nvc0_pcopy_code[] = {
+static u32 nvc0_pcopy_code[] = {
 /* 0x0000: main */
 	0x04fe04bd,
 	0x3517f000,

drivers/gpu/drm/nouveau/core/engine/crypt/fuc/nv98.fuc.h

@@ -1,4 +1,4 @@
-uint32_t nv98_pcrypt_data[] = {
+static uint32_t nv98_pcrypt_data[] = {
 /* 0x0000: ctx_dma */
 /* 0x0000: ctx_dma_query */
 	0x00000000,
@@ -150,7 +150,7 @@ uint32_t nv98_pcrypt_data[] = {
 	0x00000000,
 };
 
-uint32_t nv98_pcrypt_code[] = {
+static uint32_t nv98_pcrypt_code[] = {
 	0x17f004bd,
 	0x0010fe35,
 	0xf10004fe,

drivers/gpu/drm/nouveau/core/engine/disp/vga.c

@@ -24,6 +24,7 @@
 
 #include <core/subdev.h>
 #include <core/device.h>
+#include <subdev/vga.h>
 
 u8
 nv_rdport(void *obj, int head, u16 port)

drivers/gpu/drm/nouveau/core/engine/fifo/base.c

@@ -132,7 +132,7 @@ _nouveau_fifo_channel_wr32(struct nouveau_object *object, u32 addr, u32 data)
 	iowrite32_native(data, chan->user + addr);
 }
 
-int
+static int
 nouveau_fifo_chid(struct nouveau_fifo *priv, struct nouveau_object *object)
 {
 	int engidx = nv_hclass(priv) & 0xff;

drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c

@@ -319,7 +319,7 @@ nv84_fifo_sclass[] = {
  * FIFO context - basically just the instmem reserved for the channel
  ******************************************************************************/
 
-int
+static int
 nv84_fifo_context_ctor(struct nouveau_object *parent,
 		       struct nouveau_object *engine,
 		       struct nouveau_oclass *oclass, void *data, u32 size,

drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc.h

@@ -1,4 +1,4 @@
-uint32_t nvc0_grgpc_data[] = {
+static uint32_t nvc0_grgpc_data[] = {
 	0x00000000,
 	0x00000000,
 	0x00000000,
@@ -150,7 +150,7 @@ uint32_t nvc0_grgpc_data[] = {
 	0x08000750,
 };
 
-uint32_t nvc0_grgpc_code[] = {
+static uint32_t nvc0_grgpc_code[] = {
 	0x03060ef5,
 	0x9800d898,
 	0x86f001d9,

drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvc0.fuc.h

@@ -1,4 +1,4 @@
-uint32_t nvc0_grhub_data[] = {
+static uint32_t nvc0_grhub_data[] = {
 	0x00000000,
 	0x00000000,
 	0x00000000,
@@ -194,7 +194,7 @@ uint32_t nvc0_grhub_data[] = {
 	0x00000000,
 };
 
-uint32_t nvc0_grhub_code[] = {
+static uint32_t nvc0_grhub_code[] = {
 	0x03090ef5,
 	0x9800d898,
 	0x86f001d9,

drivers/gpu/drm/nouveau/core/engine/graph/nv40.c

@@ -75,7 +75,7 @@ nv40_graph_object_ctor(struct nouveau_object *parent,
 	return 0;
 }
 
-struct nouveau_ofuncs
+static struct nouveau_ofuncs
 nv40_graph_ofuncs = {
 	.ctor = nv40_graph_object_ctor,
 	.dtor = _nouveau_gpuobj_dtor,

drivers/gpu/drm/nouveau/core/engine/graph/nv50.c

@@ -73,7 +73,7 @@ nv50_graph_object_ctor(struct nouveau_object *parent,
 	return 0;
 }
 
-struct nouveau_ofuncs
+static struct nouveau_ofuncs
 nv50_graph_ofuncs = {
 	.ctor = nv50_graph_object_ctor,
 	.dtor = _nouveau_gpuobj_dtor,

drivers/gpu/drm/nouveau/core/engine/mpeg/nv31.c

@@ -109,7 +109,7 @@ nv31_mpeg_mthd_dma(struct nouveau_object *object, u32 mthd, void *arg, u32 len)
 	return 0;
 }
 
-struct nouveau_ofuncs
+static struct nouveau_ofuncs
 nv31_mpeg_ofuncs = {
 	.ctor = nv31_mpeg_object_ctor,
 	.dtor = _nouveau_gpuobj_dtor,
@@ -119,7 +119,7 @@ nv31_mpeg_ofuncs = {
 	.wr32 = _nouveau_gpuobj_wr32,
 };
 
-struct nouveau_omthds
+static struct nouveau_omthds
 nv31_mpeg_omthds[] = {
 	{ 0x0190, nv31_mpeg_mthd_dma },
 	{ 0x01a0, nv31_mpeg_mthd_dma },

drivers/gpu/drm/nouveau/core/subdev/bios/conn.c

@@ -26,6 +26,7 @@
 
 #include <subdev/bios.h>
 #include <subdev/bios/dcb.h>
+#include <subdev/bios/conn.h>
 
 u16
 dcb_conntab(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)

drivers/gpu/drm/nouveau/core/subdev/mxm/base.c

@@ -210,7 +210,7 @@ mxm_shadow_wmi(struct nouveau_mxm *mxm, u8 version)
 }
 #endif
 
-struct mxm_shadow_h {
+static struct mxm_shadow_h {
 	const char *name;
 	bool (*exec)(struct nouveau_mxm *, u8 version);
 } _mxm_shadow[] = {

drivers/gpu/drm/nouveau/core/subdev/vm/nv50.c

@@ -34,7 +34,7 @@ struct nv50_vmmgr_priv {
 	spinlock_t lock;
 };
 
-void
+static void
 nv50_vm_map_pgt(struct nouveau_gpuobj *pgd, u32 pde,
 		struct nouveau_gpuobj *pgt[2])
 {
@@ -76,7 +76,7 @@ vm_addr(struct nouveau_vma *vma, u64 phys, u32 memtype, u32 target)
 	return phys;
 }
 
-void
+static void
 nv50_vm_map(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt,
 	    struct nouveau_mem *mem, u32 pte, u32 cnt, u64 phys, u64 delta)
 {
@@ -123,7 +123,7 @@ nv50_vm_map(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt,
 	}
 }
 
-void
+static void
 nv50_vm_map_sg(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt,
 	       struct nouveau_mem *mem, u32 pte, u32 cnt, dma_addr_t *list)
 {
@@ -137,7 +137,7 @@ nv50_vm_map_sg(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt,
 	}
 }
 
-void
+static void
 nv50_vm_unmap(struct nouveau_gpuobj *pgt, u32 pte, u32 cnt)
 {
 	pte <<= 3;
@@ -148,7 +148,7 @@ nv50_vm_unmap(struct nouveau_gpuobj *pgt, u32 pte, u32 cnt)
 	}
 }
 
-void
+static void
 nv50_vm_flush(struct nouveau_vm *vm)
 {
 	struct nouveau_engine *engine;

drivers/gpu/drm/nouveau/core/subdev/vm/nvc0.c

@@ -34,7 +34,7 @@ struct nvc0_vmmgr_priv {
 	spinlock_t lock;
 };
 
-void
+static void
 nvc0_vm_map_pgt(struct nouveau_gpuobj *pgd, u32 index,
 		struct nouveau_gpuobj *pgt[2])
 {
@@ -64,7 +64,7 @@ nvc0_vm_addr(struct nouveau_vma *vma, u64 phys, u32 memtype, u32 target)
 	return phys;
 }
 
-void
+static void
 nvc0_vm_map(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt,
 	    struct nouveau_mem *mem, u32 pte, u32 cnt, u64 phys, u64 delta)
 {
@@ -80,7 +80,7 @@ nvc0_vm_map(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt,
 	}
 }
 
-void
+static void
 nvc0_vm_map_sg(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt,
 	       struct nouveau_mem *mem, u32 pte, u32 cnt, dma_addr_t *list)
 {
@@ -95,7 +95,7 @@ nvc0_vm_map_sg(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt,
 	}
 }
 
-void
+static void
 nvc0_vm_unmap(struct nouveau_gpuobj *pgt, u32 pte, u32 cnt)
 {
 	pte <<= 3;
@@ -132,7 +132,7 @@ nvc0_vm_flush_engine(struct nouveau_subdev *subdev, u64 addr, int type)
 	spin_unlock_irqrestore(&priv->lock, flags);
 }
 
-void
+static void
 nvc0_vm_flush(struct nouveau_vm *vm)
 {
 	struct nouveau_vm_pgd *vpgd;

drivers/gpu/drm/nouveau/nouveau_chan.c

@@ -182,7 +182,7 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nouveau_cli *cli,
 	return 0;
 }
 
-int
+static int
 nouveau_channel_ind(struct nouveau_drm *drm, struct nouveau_cli *cli,
 		    u32 parent, u32 handle, u32 engine,
 		    struct nouveau_channel **pchan)

drivers/gpu/drm/nouveau/nouveau_dp.c

@@ -286,7 +286,7 @@ dp_link_train_fini(struct drm_device *dev, struct dp_state *dp)
 	nouveau_bios_run_init_table(dev, script, dp->dcb, dp->crtc);
 }
 
-bool
+static bool
 nouveau_dp_link_train(struct drm_encoder *encoder, u32 datarate,
 		      struct dp_train_func *func)
 {

drivers/gpu/drm/nouveau/nouveau_drm.c

@@ -64,7 +64,7 @@ static int nouveau_noaccel = 0;
 module_param_named(noaccel, nouveau_noaccel, int, 0400);
 
 MODULE_PARM_DESC(modeset, "enable driver");
-int nouveau_modeset = -1;
+static int nouveau_modeset = -1;
 module_param_named(modeset, nouveau_modeset, int, 0400);
 
 static struct drm_driver driver;
@@ -238,7 +238,7 @@ nouveau_drm_probe(struct pci_dev *pdev, const struct pci_device_id *pent)
 	return 0;
 }
 
-int
+static int
 nouveau_drm_load(struct drm_device *dev, unsigned long flags)
 {
 	struct pci_dev *pdev = dev->pdev;
@@ -352,7 +352,7 @@ fail_device:
 	return ret;
 }
 
-int
+static int
 nouveau_drm_unload(struct drm_device *dev)
 {
 	struct nouveau_drm *drm = nouveau_drm(dev);
@@ -490,7 +490,7 @@ nouveau_drm_resume(struct pci_dev *pdev)
 	return 0;
 }
 
-int
+static int
 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
 {
 	struct pci_dev *pdev = dev->pdev;
@@ -519,7 +519,7 @@ nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
 	return 0;
 }
 
-void
+static void
 nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
 {
 	struct nouveau_cli *cli = nouveau_cli(fpriv);
@@ -533,7 +533,7 @@ nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
 	mutex_unlock(&drm->client.mutex);
 }
 
-void
+static void
 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
 {
 	struct nouveau_cli *cli = nouveau_cli(fpriv);

drivers/gpu/drm/nouveau/nouveau_irq.c

@@ -25,6 +25,7 @@
 #include <subdev/mc.h>
 
 #include "nouveau_drm.h"
+#include "nouveau_irq.h"
 #include "nv50_display.h"
 
 void

drivers/gpu/drm/nouveau/nouveau_mem.c

@@ -248,7 +248,7 @@ nouveau_mem_ddr2_mr(struct drm_device *dev, u32 freq,
 	return 0;
 }
 
-uint8_t nv_mem_wr_lut_ddr3[NV_MEM_WR_DDR3_MAX] = {
+static const uint8_t nv_mem_wr_lut_ddr3[NV_MEM_WR_DDR3_MAX] = {
 	0, 0, 0, 0, 0, 1, 2, 3, 4, 5, 5, 6, 6, 7, 7, 0, 0};
 
 static int
@@ -297,9 +297,9 @@ nouveau_mem_ddr3_mr(struct drm_device *dev, u32 freq,
 	return 0;
 }
 
-uint8_t nv_mem_cl_lut_gddr3[NV_MEM_CL_GDDR3_MAX] = {
+static const uint8_t nv_mem_cl_lut_gddr3[NV_MEM_CL_GDDR3_MAX] = {
 	0, 0, 0, 0, 4, 5, 6, 7, 0, 1, 2, 3, 8, 9, 10, 11};
-uint8_t nv_mem_wr_lut_gddr3[NV_MEM_WR_GDDR3_MAX] = {
+static const uint8_t nv_mem_wr_lut_gddr3[NV_MEM_WR_GDDR3_MAX] = {
 	0, 0, 0, 0, 0, 2, 3, 8, 9, 10, 11, 0, 0, 1, 1, 0, 3};
 
 static int

drivers/gpu/drm/nouveau/nouveau_ttm.c

@@ -101,7 +101,7 @@ nouveau_vram_manager_new(struct ttm_mem_type_manager *man,
 	return 0;
 }
 
-void
+static void
 nouveau_vram_manager_debug(struct ttm_mem_type_manager *man, const char *prefix)
 {
 	struct nouveau_mm *mm = man->priv;
@@ -176,7 +176,7 @@ nouveau_gart_manager_new(struct ttm_mem_type_manager *man,
 	return 0;
 }
 
-void
+static void
 nouveau_gart_manager_debug(struct ttm_mem_type_manager *man, const char *prefix)
 {
 }
@@ -248,7 +248,7 @@ nv04_gart_manager_new(struct ttm_mem_type_manager *man,
 	return 0;
 }
 
-void
+static void
 nv04_gart_manager_debug(struct ttm_mem_type_manager *man, const char *prefix)
 {
 }

drivers/gpu/drm/nouveau/nouveau_vga.c

@@ -7,6 +7,7 @@
 #include "nouveau_drm.h"
 #include "nouveau_acpi.h"
 #include "nouveau_fbcon.h"
+#include "nouveau_vga.h"
 
 static unsigned int
 nouveau_vga_set_decode(void *priv, bool state)