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@@ -21,6 +21,7 @@
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#include <linux/irq.h>
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#include <linux/bitrev.h>
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#include <linux/console.h>
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+#include <asm/cpuidle.h>
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#include <asm/io.h>
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#include <asm/tlbflush.h>
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#include <asm/suspend.h>
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@@ -347,7 +348,8 @@ static int sh7372_do_idle_core_standby(unsigned long unused)
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return 0;
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}
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-static void sh7372_enter_core_standby(void)
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+static int sh7372_enter_core_standby(struct cpuidle_device *dev,
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+ struct cpuidle_driver *drv, int index)
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{
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sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc));
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@@ -358,52 +360,61 @@ static void sh7372_enter_core_standby(void)
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/* disable reset vector translation */
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__raw_writel(0, SBAR);
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+
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+ return 1;
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}
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-static void sh7372_enter_a3sm_pll_on(void)
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+static int sh7372_enter_a3sm_pll_on(struct cpuidle_device *dev,
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+ struct cpuidle_driver *drv, int index)
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{
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sh7372_enter_a3sm_common(1);
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+ return 2;
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}
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-static void sh7372_enter_a3sm_pll_off(void)
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+static int sh7372_enter_a3sm_pll_off(struct cpuidle_device *dev,
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+ struct cpuidle_driver *drv, int index)
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{
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sh7372_enter_a3sm_common(0);
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+ return 3;
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}
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-static void sh7372_cpuidle_setup(struct cpuidle_driver *drv)
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-{
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- struct cpuidle_state *state = &drv->states[drv->state_count];
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-
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- snprintf(state->name, CPUIDLE_NAME_LEN, "C2");
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- strncpy(state->desc, "Core Standby Mode", CPUIDLE_DESC_LEN);
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- state->exit_latency = 10;
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- state->target_residency = 20 + 10;
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- state->flags = CPUIDLE_FLAG_TIME_VALID;
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- shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_core_standby;
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- drv->state_count++;
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-
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- state = &drv->states[drv->state_count];
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- snprintf(state->name, CPUIDLE_NAME_LEN, "C3");
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- strncpy(state->desc, "A3SM PLL ON", CPUIDLE_DESC_LEN);
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- state->exit_latency = 20;
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- state->target_residency = 30 + 20;
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- state->flags = CPUIDLE_FLAG_TIME_VALID;
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- shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_a3sm_pll_on;
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- drv->state_count++;
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-
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- state = &drv->states[drv->state_count];
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- snprintf(state->name, CPUIDLE_NAME_LEN, "C4");
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- strncpy(state->desc, "A3SM PLL OFF", CPUIDLE_DESC_LEN);
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- state->exit_latency = 120;
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- state->target_residency = 30 + 120;
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- state->flags = CPUIDLE_FLAG_TIME_VALID;
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- shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_a3sm_pll_off;
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- drv->state_count++;
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-}
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+static struct cpuidle_driver sh7372_cpuidle_driver = {
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+ .name = "sh7372_cpuidle",
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+ .owner = THIS_MODULE,
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+ .en_core_tk_irqen = 1,
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+ .state_count = 4,
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+ .safe_state_index = 0, /* C1 */
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+ .states[0] = ARM_CPUIDLE_WFI_STATE,
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+ .states[0].enter = shmobile_enter_wfi,
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+ .states[1] = {
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+ .name = "C2",
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+ .desc = "Core Standby Mode",
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+ .exit_latency = 10,
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+ .target_residency = 20 + 10,
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+ .flags = CPUIDLE_FLAG_TIME_VALID,
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+ .enter = sh7372_enter_core_standby,
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+ },
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+ .states[2] = {
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+ .name = "C3",
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+ .desc = "A3SM PLL ON",
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+ .exit_latency = 20,
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+ .target_residency = 30 + 20,
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+ .flags = CPUIDLE_FLAG_TIME_VALID,
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+ .enter = sh7372_enter_a3sm_pll_on,
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+ },
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+ .states[3] = {
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+ .name = "C4",
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+ .desc = "A3SM PLL OFF",
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+ .exit_latency = 120,
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+ .target_residency = 30 + 120,
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+ .flags = CPUIDLE_FLAG_TIME_VALID,
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+ .enter = sh7372_enter_a3sm_pll_off,
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+ },
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+};
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static void sh7372_cpuidle_init(void)
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{
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- shmobile_cpuidle_setup = sh7372_cpuidle_setup;
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+ shmobile_cpuidle_set_driver(&sh7372_cpuidle_driver);
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}
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#else
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static void sh7372_cpuidle_init(void) {}
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