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@@ -161,6 +161,26 @@ static void fixup_use_write_buffers(struct mtd_info *mtd, void *param)
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}
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}
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}
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}
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+/* Atmel chips don't use the same PRI format as AMD chips */
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+static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
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+{
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+ struct map_info *map = mtd->priv;
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+ struct cfi_private *cfi = map->fldrv_priv;
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+ struct cfi_pri_amdstd *extp = cfi->cmdset_priv;
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+ struct cfi_pri_atmel atmel_pri;
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+
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+ memcpy(&atmel_pri, extp, sizeof(atmel_pri));
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+ memset(extp + 5, 0, sizeof(*extp) - 5);
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+
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+ if (atmel_pri.Features & 0x02)
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+ extp->EraseSuspend = 2;
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+
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+ if (atmel_pri.BottomBoot)
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+ extp->TopBottom = 2;
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+ else
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+ extp->TopBottom = 3;
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+}
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+
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static void fixup_use_secsi(struct mtd_info *mtd, void *param)
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static void fixup_use_secsi(struct mtd_info *mtd, void *param)
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{
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{
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/* Setup for chips with a secsi area */
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/* Setup for chips with a secsi area */
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@@ -192,6 +212,7 @@ static struct cfi_fixup cfi_fixup_table[] = {
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#if !FORCE_WORD_WRITE
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#if !FORCE_WORD_WRITE
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{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
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{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
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#endif
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#endif
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+ { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
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{ 0, 0, NULL, NULL }
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{ 0, 0, NULL, NULL }
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};
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};
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static struct cfi_fixup jedec_fixup_table[] = {
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static struct cfi_fixup jedec_fixup_table[] = {
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