davinci: Correct the number of GPIO pins for da850/omap-l138

DA850/OMAP-L138 has 144 pins configurable as GPIO, but
currently this has been configured as 128. This patch
corrects it.

Also, this patch adds the base address for GPIO pins
greater than 128.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

arch/arm/mach-davinci/da850.c

@@ -623,7 +623,7 @@ static struct davinci_soc_info davinci_soc_info_da850 = {
 	.intc_irq_num		= DA850_N_CP_INTC_IRQ,
 	.timer_info		= &da850_timer_info,
 	.gpio_base		= IO_ADDRESS(DA8XX_GPIO_BASE),
-	.gpio_num		= 128,
+	.gpio_num		= 144,
 	.gpio_irq		= IRQ_DA8XX_GPIO0,
 	.serial_dev		= &da8xx_serial_device,
 	.emac_pdata		= &da8xx_emac_pdata,

arch/arm/mach-davinci/include/mach/gpio.h

@@ -78,6 +78,8 @@ __gpio_to_controller(unsigned gpio)
 		ptr = base + 0x60;
 	else if (gpio < 32 * 4)
 		ptr = base + 0x88;
+	else if (gpio < 32 * 5)
+		ptr = base + 0xb0;
 	else
 		ptr = NULL;
 	return ptr;

arch/arm/mach-davinci/include/mach/irqs.h

@@ -397,8 +397,8 @@
 
 #define DA850_N_CP_INTC_IRQ		101
 
-/* da830/da850 currently has the most gpio pins (128) */
-#define DAVINCI_N_GPIO			128
+/* da850 currently has the most gpio pins (144) */
+#define DAVINCI_N_GPIO			144
 /* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */
 #define NR_IRQS				(DA850_N_CP_INTC_IRQ + DAVINCI_N_GPIO)