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@@ -287,27 +287,28 @@ ENTRY(startup_32_smp)
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leal -__PAGE_OFFSET(%ecx),%esp
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default_entry:
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-
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/*
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* New page tables may be in 4Mbyte page mode and may
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* be using the global pages.
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*
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* NOTE! If we are on a 486 we may have no cr4 at all!
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- * So we do not try to touch it unless we really have
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- * some bits in it to set. This won't work if the BSP
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- * implements cr4 but this AP does not -- very unlikely
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- * but be warned! The same applies to the pse feature
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- * if not equally supported. --macro
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- *
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- * NOTE! We have to correct for the fact that we're
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- * not yet offset PAGE_OFFSET..
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+ * Specifically, cr4 exists if and only if CPUID exists,
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+ * which in turn exists if and only if EFLAGS.ID exists.
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*/
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-#define cr4_bits pa(mmu_cr4_features)
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- movl cr4_bits,%edx
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- andl %edx,%edx
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- jz 6f
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- movl %cr4,%eax # Turn on paging options (PSE,PAE,..)
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- orl %edx,%eax
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+ movl $X86_EFLAGS_ID,%ecx
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+ pushl %ecx
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+ popfl
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+ pushfl
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+ popl %eax
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+ pushl $0
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+ popfl
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+ pushfl
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+ popl %edx
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+ xorl %edx,%eax
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+ testl %ecx,%eax
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+ jz 6f # No ID flag = no CPUID = no CR4
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+
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+ movl pa(mmu_cr4_features),%eax
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movl %eax,%cr4
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testb $X86_CR4_PAE, %al # check if PAE is enabled
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