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@@ -9,16 +9,43 @@
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#include <linux/kernel.h>
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#include <linux/ptrace.h>
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+const char * const greg_names[] = {
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+ "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
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+ "P0", "P1", "P2", "P3", "P4", "P5", "SP", "FP",
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+ "I0", "I1", "I2", "I3", "M0", "M1", "M2", "M3",
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+ "B0", "B1", "B2", "B3", "L0", "L1", "L2", "L3",
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+ "A0.X", "A0.W", "A1.X", "A1.W", "<res>", "<res>", "ASTAT", "RETS",
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+ "<res>", "<res>", "<res>", "<res>", "<res>", "<res>", "<res>", "<res>",
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+ "LC0", "LT0", "LB0", "LC1", "LT1", "LB1", "CYCLES", "CYCLES2",
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+ "USP", "SEQSTAT", "SYSCFG", "RETI", "RETX", "RETN", "RETE", "EMUDAT",
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+};
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+
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+static const char *get_allreg_name(int grp, int reg)
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+{
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+ return greg_names[(grp << 3) | reg];
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+}
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+
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/*
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* Unfortunately, the pt_regs structure is not laid out the same way as the
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* hardware register file, so we need to do some fix ups.
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+ *
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+ * CYCLES is not stored in the pt_regs structure - so, we just read it from
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+ * the hardware.
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+ *
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+ * Don't support:
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+ * - All reserved registers
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+ * - All in group 7 are (supervisors only)
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*/
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+
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static bool fix_up_reg(struct pt_regs *fp, long *value, int grp, int reg)
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{
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long *val = &fp->r0;
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+ unsigned long tmp;
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/* Only do Dregs and Pregs for now */
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- if (grp > 1)
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+ if (grp == 5 ||
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+ (grp == 4 && (reg == 4 || reg == 5)) ||
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+ (grp == 7))
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return false;
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if (grp == 0 || (grp == 1 && reg < 6))
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@@ -27,6 +54,32 @@ static bool fix_up_reg(struct pt_regs *fp, long *value, int grp, int reg)
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val = &fp->usp;
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else if (grp == 1 && reg == 7)
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val = &fp->fp;
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+ else if (grp == 2) {
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+ val = &fp->i0;
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+ val -= reg;
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+ } else if (grp == 3 && reg >= 4) {
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+ val = &fp->l0;
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+ val -= (reg - 4);
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+ } else if (grp == 3 && reg < 4) {
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+ val = &fp->b0;
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+ val -= reg;
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+ } else if (grp == 4 && reg < 4) {
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+ val = &fp->a0x;
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+ val -= reg;
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+ } else if (grp == 4 && reg == 6)
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+ val = &fp->astat;
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+ else if (grp == 4 && reg == 7)
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+ val = &fp->rets;
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+ else if (grp == 6 && reg < 6) {
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+ val = &fp->lc0;
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+ val -= reg;
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+ } else if (grp == 6 && reg == 6) {
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+ __asm__ __volatile__("%0 = cycles;\n" : "=d"(tmp));
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+ val = &tmp;
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+ } else if (grp == 6 && reg == 7) {
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+ __asm__ __volatile__("%0 = cycles2;\n" : "=d"(tmp));
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+ val = &tmp;
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+ }
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*value = *val;
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return true;
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@@ -68,8 +121,9 @@ bool execute_pseudodbg_assert(struct pt_regs *fp, unsigned int opcode)
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/* DBGA ( regs_lo , uimm16 ) */
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/* DBGAL ( regs , uimm16 ) */
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if (expected != (value & 0xFFFF)) {
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- pr_notice("DBGA (%s%i.L,0x%x) failure, got 0x%x\n", grp ? "P" : "R",
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- regtest, expected, (unsigned int)(value & 0xFFFF));
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+ pr_notice("DBGA (%s.L,0x%x) failure, got 0x%x\n",
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+ get_allreg_name(grp, regtest),
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+ expected, (unsigned int)(value & 0xFFFF));
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return false;
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}
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@@ -77,8 +131,9 @@ bool execute_pseudodbg_assert(struct pt_regs *fp, unsigned int opcode)
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/* DBGA ( regs_hi , uimm16 ) */
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/* DBGAH ( regs , uimm16 ) */
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if (expected != ((value >> 16) & 0xFFFF)) {
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- pr_notice("DBGA (%s%i.H,0x%x) failure, got 0x%x\n", grp ? "P" : "R",
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- regtest, expected, (unsigned int)((value >> 16) & 0xFFFF));
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+ pr_notice("DBGA (%s.H,0x%x) failure, got 0x%x\n",
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+ get_allreg_name(grp, regtest),
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+ expected, (unsigned int)((value >> 16) & 0xFFFF));
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return false;
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}
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}
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@@ -116,7 +171,7 @@ bool execute_pseudodbg(struct pt_regs *fp, unsigned int opcode)
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if (!fix_up_reg(fp, &value, grp, reg))
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return false;
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- pr_notice("DBG %s%d = %08lx\n", grp ? "P" : "R", reg, value);
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+ pr_notice("DBG %s = %08lx\n", get_allreg_name(grp, reg), value);
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fp->pc += 2;
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return true;
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