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@@ -83,7 +83,7 @@
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#define AT91_MCI_ERRORS (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE \
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#define AT91_MCI_ERRORS (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE \
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| AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE \
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| AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE \
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- | AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)
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+ | AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)
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#define at91_mci_read(host, reg) __raw_readl((host)->baseaddr + (reg))
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#define at91_mci_read(host, reg) __raw_readl((host)->baseaddr + (reg))
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#define at91_mci_write(host, reg, val) __raw_writel((val), (host)->baseaddr + (reg))
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#define at91_mci_write(host, reg, val) __raw_writel((val), (host)->baseaddr + (reg))
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@@ -676,15 +676,15 @@ static irqreturn_t at91_mci_irq(int irq, void *devid)
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int_status = at91_mci_read(host, AT91_MCI_SR);
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int_status = at91_mci_read(host, AT91_MCI_SR);
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int_mask = at91_mci_read(host, AT91_MCI_IMR);
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int_mask = at91_mci_read(host, AT91_MCI_IMR);
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-
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+
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pr_debug("MCI irq: status = %08X, %08X, %08X\n", int_status, int_mask,
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pr_debug("MCI irq: status = %08X, %08X, %08X\n", int_status, int_mask,
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int_status & int_mask);
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int_status & int_mask);
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-
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+
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int_status = int_status & int_mask;
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int_status = int_status & int_mask;
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if (int_status & AT91_MCI_ERRORS) {
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if (int_status & AT91_MCI_ERRORS) {
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completed = 1;
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completed = 1;
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-
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+
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if (int_status & AT91_MCI_UNRE)
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if (int_status & AT91_MCI_UNRE)
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pr_debug("MMC: Underrun error\n");
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pr_debug("MMC: Underrun error\n");
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if (int_status & AT91_MCI_OVRE)
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if (int_status & AT91_MCI_OVRE)
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