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@@ -205,6 +205,7 @@ struct intel_device_info {
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u8 is_g4x : 1;
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u8 is_pineview : 1;
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u8 is_ironlake : 1;
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+ u8 is_gen6 : 1;
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u8 has_fbc : 1;
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u8 has_rc6 : 1;
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u8 has_pipe_cxsr : 1;
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@@ -1084,6 +1085,7 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
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#define IS_IRONLAKE_M(dev) ((dev)->pci_device == 0x0046)
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#define IS_IRONLAKE(dev) (INTEL_INFO(dev)->is_ironlake)
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#define IS_I9XX(dev) (INTEL_INFO(dev)->is_i9xx)
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+#define IS_GEN6(dev) (INTEL_INFO(dev)->is_gen6)
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#define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile)
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#define IS_GEN3(dev) (IS_I915G(dev) || \
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@@ -1107,8 +1109,6 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
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#define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws)
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-#define IS_GEN6(dev) ((dev)->pci_device == 0x0102)
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-
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/* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
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* rows, which changed the alignment requirements and fence programming.
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*/
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