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@@ -90,14 +90,14 @@ static void XGINew_DDR1x_MRS_340(unsigned long P3c4,
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xgifb_reg_set(P3c4, 0x16, 0x80);
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udelay(60);
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- xgifb_reg_set(P3c4, 0x18, pVBInfo->SR15[pVBInfo->ram_type]); /* SR18 */
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+ xgifb_reg_set(P3c4, 0x18, pVBInfo->SR18[pVBInfo->ram_type]); /* SR18 */
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xgifb_reg_set(P3c4, 0x19, 0x01);
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xgifb_reg_set(P3c4, 0x16, 0x03);
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xgifb_reg_set(P3c4, 0x16, 0x83);
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mdelay(1);
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xgifb_reg_set(P3c4, 0x1B, 0x03);
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udelay(500);
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- xgifb_reg_set(P3c4, 0x18, pVBInfo->SR15[pVBInfo->ram_type]); /* SR18 */
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+ xgifb_reg_set(P3c4, 0x18, pVBInfo->SR18[pVBInfo->ram_type]); /* SR18 */
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xgifb_reg_set(P3c4, 0x19, 0x00);
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xgifb_reg_set(P3c4, 0x16, 0x03);
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xgifb_reg_set(P3c4, 0x16, 0x83);
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@@ -261,14 +261,14 @@ static void XGINew_DDR1x_MRS_XG20(unsigned long P3c4,
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xgifb_reg_set(P3c4, 0x16, 0x00);
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xgifb_reg_set(P3c4, 0x16, 0x80);
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udelay(60);
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- xgifb_reg_set(P3c4, 0x18, pVBInfo->SR15[pVBInfo->ram_type]); /* SR18 */
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+ xgifb_reg_set(P3c4, 0x18, pVBInfo->SR18[pVBInfo->ram_type]); /* SR18 */
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xgifb_reg_set(P3c4, 0x19, 0x01);
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xgifb_reg_set(P3c4, 0x16, 0x03);
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xgifb_reg_set(P3c4, 0x16, 0x83);
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mdelay(1);
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xgifb_reg_set(P3c4, 0x1B, 0x03);
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udelay(500);
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- xgifb_reg_set(P3c4, 0x18, pVBInfo->SR15[pVBInfo->ram_type]); /* SR18 */
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+ xgifb_reg_set(P3c4, 0x18, pVBInfo->SR18[pVBInfo->ram_type]); /* SR18 */
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xgifb_reg_set(P3c4, 0x19, 0x00);
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xgifb_reg_set(P3c4, 0x16, 0x03);
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xgifb_reg_set(P3c4, 0x16, 0x83);
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