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@@ -29,21 +29,21 @@ pyxis_update_irq_hw(unsigned long mask)
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}
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static inline void
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-pyxis_enable_irq(unsigned int irq)
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+pyxis_enable_irq(struct irq_data *d)
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{
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- pyxis_update_irq_hw(cached_irq_mask |= 1UL << (irq - 16));
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+ pyxis_update_irq_hw(cached_irq_mask |= 1UL << (d->irq - 16));
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}
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static void
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-pyxis_disable_irq(unsigned int irq)
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+pyxis_disable_irq(struct irq_data *d)
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{
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- pyxis_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16)));
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+ pyxis_update_irq_hw(cached_irq_mask &= ~(1UL << (d->irq - 16)));
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}
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static void
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-pyxis_mask_and_ack_irq(unsigned int irq)
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+pyxis_mask_and_ack_irq(struct irq_data *d)
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{
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- unsigned long bit = 1UL << (irq - 16);
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+ unsigned long bit = 1UL << (d->irq - 16);
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unsigned long mask = cached_irq_mask &= ~bit;
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/* Disable the interrupt. */
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@@ -58,9 +58,9 @@ pyxis_mask_and_ack_irq(unsigned int irq)
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static struct irq_chip pyxis_irq_type = {
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.name = "PYXIS",
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- .mask_ack = pyxis_mask_and_ack_irq,
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- .mask = pyxis_disable_irq,
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- .unmask = pyxis_enable_irq,
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+ .irq_mask_ack = pyxis_mask_and_ack_irq,
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+ .irq_mask = pyxis_disable_irq,
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+ .irq_unmask = pyxis_enable_irq,
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};
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void
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@@ -103,7 +103,7 @@ init_pyxis_irqs(unsigned long ignore_mask)
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if ((ignore_mask >> i) & 1)
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continue;
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set_irq_chip_and_handler(i, &pyxis_irq_type, handle_level_irq);
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- irq_to_desc(i)->status |= IRQ_LEVEL;
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+ irq_set_status_flags(i, IRQ_LEVEL);
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}
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setup_irq(16+7, &isa_cascade_irqaction);
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