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@@ -210,10 +210,10 @@ struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
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struct dimm_info *dimm;
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u32 *ce_per_layer[EDAC_MAX_LAYERS], *ue_per_layer[EDAC_MAX_LAYERS];
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unsigned pos[EDAC_MAX_LAYERS];
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- void *pvt, *ptr = NULL;
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unsigned size, tot_dimms = 1, count = 1;
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unsigned tot_csrows = 1, tot_channels = 1, tot_errcount = 0;
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- int i, j, err, row, chn;
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+ void *pvt, *p, *ptr = NULL;
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+ int i, j, err, row, chn, n, len;
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bool per_rank = false;
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BUG_ON(n_layers > EDAC_MAX_LAYERS || n_layers == 0);
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@@ -325,10 +325,26 @@ struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
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i, per_rank ? "rank" : "dimm", (dimm - mci->dimms),
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pos[0], pos[1], pos[2], row, chn);
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- /* Copy DIMM location */
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- for (j = 0; j < n_layers; j++)
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+ /*
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+ * Copy DIMM location and initialize it.
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+ */
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+ len = sizeof(dimm->label);
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+ p = dimm->label;
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+ n = snprintf(p, len, "mc#%u", mc_num);
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+ p += n;
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+ len -= n;
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+ for (j = 0; j < n_layers; j++) {
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+ n = snprintf(p, len, "%s#%u",
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+ edac_layer_name[layers[j].type],
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+ pos[j]);
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+ p += n;
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+ len -= n;
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dimm->location[j] = pos[j];
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+ if (len <= 0)
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+ break;
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+ }
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+
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/* Link it to the csrows old API data */
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chan->dimm = dimm;
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dimm->csrow = row;
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@@ -834,7 +850,7 @@ static void edac_inc_ce_error(struct mem_ctl_info *mci,
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{
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int i, index = 0;
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- mci->ce_count++;
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+ mci->ce_mc++;
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if (!enable_per_layer_report) {
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mci->ce_noinfo_count++;
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@@ -858,7 +874,7 @@ static void edac_inc_ue_error(struct mem_ctl_info *mci,
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{
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int i, index = 0;
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- mci->ue_count++;
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+ mci->ue_mc++;
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if (!enable_per_layer_report) {
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mci->ce_noinfo_count++;
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