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@@ -31,7 +31,8 @@ enum fields {
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BIMM = 0x040,
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JIMM = 0x080,
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FUNC = 0x100,
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- SET = 0x200
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+ SET = 0x200,
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+ SCIMM = 0x400
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};
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#define OP_MASK 0x3f
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@@ -52,6 +53,8 @@ enum fields {
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#define FUNC_SH 0
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#define SET_MASK 0x7
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#define SET_SH 0
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+#define SCIMM_MASK 0xfffff
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+#define SCIMM_SH 6
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enum opcode {
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insn_invalid,
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@@ -64,7 +67,7 @@ enum opcode {
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insn_mtc0, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd,
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insn_sd, insn_sll, insn_sra, insn_srl, insn_rotr, insn_subu, insn_sw,
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insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori,
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- insn_dins
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+ insn_dins, insn_syscall
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};
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struct insn {
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@@ -136,6 +139,7 @@ static struct insn insn_table[] __cpuinitdata = {
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{ insn_xor, M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD },
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{ insn_xori, M(xori_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
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{ insn_dins, M(spec3_op, 0, 0, 0, 0, dins_op), RS | RT | RD | RE },
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+ { insn_syscall, M(spec_op, 0, 0, 0, 0, syscall_op), SCIMM},
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{ insn_invalid, 0, 0 }
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};
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@@ -208,6 +212,14 @@ static inline __cpuinit u32 build_jimm(u32 arg)
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return (arg >> 2) & JIMM_MASK;
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}
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+static inline __cpuinit u32 build_scimm(u32 arg)
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+{
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+ if (arg & ~SCIMM_MASK)
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+ printk(KERN_WARNING "Micro-assembler field overflow\n");
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+
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+ return (arg & SCIMM_MASK) << SCIMM_SH;
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+}
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+
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static inline __cpuinit u32 build_func(u32 arg)
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{
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if (arg & ~FUNC_MASK)
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@@ -266,6 +278,8 @@ static void __cpuinit build_insn(u32 **buf, enum opcode opc, ...)
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op |= build_func(va_arg(ap, u32));
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if (ip->fields & SET)
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op |= build_set(va_arg(ap, u32));
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+ if (ip->fields & SCIMM)
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+ op |= build_scimm(va_arg(ap, u32));
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va_end(ap);
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**buf = op;
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@@ -391,6 +405,7 @@ I_0(_tlbwr)
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I_u3u1u2(_xor)
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I_u2u1u3(_xori)
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I_u2u1msbu3(_dins);
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+I_u1(_syscall);
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/* Handle labels. */
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void __cpuinit uasm_build_label(struct uasm_label **lab, u32 *addr, int lid)
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