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@@ -2396,19 +2396,19 @@ static void r600_disable_interrupt_state(struct radeon_device *rdev)
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WREG32(DC_HPD4_INT_CONTROL, tmp);
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if (ASIC_IS_DCE32(rdev)) {
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tmp = RREG32(DC_HPD5_INT_CONTROL) & DC_HPDx_INT_POLARITY;
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- WREG32(DC_HPD5_INT_CONTROL, 0);
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+ WREG32(DC_HPD5_INT_CONTROL, tmp);
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tmp = RREG32(DC_HPD6_INT_CONTROL) & DC_HPDx_INT_POLARITY;
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- WREG32(DC_HPD6_INT_CONTROL, 0);
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+ WREG32(DC_HPD6_INT_CONTROL, tmp);
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}
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} else {
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WREG32(DACA_AUTODETECT_INT_CONTROL, 0);
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WREG32(DACB_AUTODETECT_INT_CONTROL, 0);
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tmp = RREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL) & DC_HOT_PLUG_DETECTx_INT_POLARITY;
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- WREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL, 0);
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+ WREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL, tmp);
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tmp = RREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL) & DC_HOT_PLUG_DETECTx_INT_POLARITY;
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- WREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL, 0);
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+ WREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL, tmp);
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tmp = RREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL) & DC_HOT_PLUG_DETECTx_INT_POLARITY;
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- WREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL, 0);
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+ WREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL, tmp);
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}
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}
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@@ -2834,14 +2834,14 @@ restart_ih:
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break;
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case 10:
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if (disp_int_cont2 & DC_HPD5_INTERRUPT) {
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- disp_int_cont &= ~DC_HPD5_INTERRUPT;
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+ disp_int_cont2 &= ~DC_HPD5_INTERRUPT;
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queue_hotplug = true;
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DRM_DEBUG("IH: HPD5\n");
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}
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break;
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case 12:
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if (disp_int_cont2 & DC_HPD6_INTERRUPT) {
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- disp_int_cont &= ~DC_HPD6_INTERRUPT;
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+ disp_int_cont2 &= ~DC_HPD6_INTERRUPT;
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queue_hotplug = true;
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DRM_DEBUG("IH: HPD6\n");
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}
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