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@@ -909,7 +909,7 @@ static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir)
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RTSX_WRITE_REG(chip, SD_VPCLK0_CTL, PHASE_NOT_RESET, PHASE_NOT_RESET);
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RTSX_WRITE_REG(chip, CLK_CTL, CHANGE_CLK, 0);
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} else {
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-#if CONFIG_RTS_PSTOR_DEBUG
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+#ifdef CONFIG_RTS_PSTOR_DEBUG
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rtsx_read_register(chip, SD_VP_CTL, &val);
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RTSX_DEBUGP("SD_VP_CTL: 0x%x\n", val);
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rtsx_read_register(chip, SD_DCMPS_CTL, &val);
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@@ -958,7 +958,7 @@ static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir)
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return STATUS_SUCCESS;
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Fail:
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-#if CONFIG_RTS_PSTOR_DEBUG
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+#ifdef CONFIG_RTS_PSTOR_DEBUG
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rtsx_read_register(chip, SD_VP_CTL, &val);
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RTSX_DEBUGP("SD_VP_CTL: 0x%x\n", val);
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rtsx_read_register(chip, SD_DCMPS_CTL, &val);
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