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@@ -87,8 +87,10 @@ controllers. The gpio-ranges property described below represents this, and
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contains information structures as follows:
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gpio-range-list ::= <single-gpio-range> [gpio-range-list]
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- single-gpio-range ::=
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+ single-gpio-range ::= <numeric-gpio-range> | <named-gpio-range>
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+ numeric-gpio-range ::=
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<pinctrl-phandle> <gpio-base> <pinctrl-base> <count>
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+ named-gpio-range ::= <pinctrl-phandle> <gpio-base> '<0 0>'
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gpio-phandle : phandle to pin controller node.
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gpio-base : Base GPIO ID in the GPIO controller
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pinctrl-base : Base pinctrl pin ID in the pin controller
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@@ -97,6 +99,19 @@ contains information structures as follows:
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The "pin controller node" mentioned above must conform to the bindings
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described in ../pinctrl/pinctrl-bindings.txt.
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+In case named gpio ranges are used (ranges with both <pinctrl-base> and
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+<count> set to 0), the property gpio-ranges-group-names contains one string
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+for every single-gpio-range in gpio-ranges:
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+ gpiorange-names-list ::= <gpiorange-name> [gpiorange-names-list]
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+ gpiorange-name : Name of the pingroup associated to the GPIO range in
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+ the respective pin controller.
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+
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+Elements of gpiorange-names-list corresponding to numeric ranges contain
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+the empty string. Elements of gpiorange-names-list corresponding to named
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+ranges contain the name of a pin group defined in the respective pin
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+controller. The number of pins/GPIOs in the range is the number of pins in
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+that pin group.
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+
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Previous versions of this binding required all pin controller nodes that
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were referenced by any gpio-ranges property to contain a property named
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#gpio-range-cells with value <3>. This requirement is now deprecated.
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@@ -104,7 +119,7 @@ However, that property may still exist in older device trees for
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compatibility reasons, and would still be required even in new device
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trees that need to be compatible with older software.
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-Example:
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+Example 1:
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qe_pio_e: gpio-controller@1460 {
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#gpio-cells = <2>;
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@@ -117,3 +132,24 @@ Example:
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Here, a single GPIO controller has GPIOs 0..9 routed to pin controller
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pinctrl1's pins 20..29, and GPIOs 10..19 routed to pin controller pinctrl2's
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pins 50..59.
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+
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+Example 2:
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+
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+ gpio_pio_i: gpio-controller@14B0 {
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+ #gpio-cells = <2>;
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+ compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
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+ reg = <0x1480 0x18>;
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+ gpio-controller;
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+ gpio-ranges = <&pinctrl1 0 20 10>,
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+ <&pinctrl2 10 0 0>,
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+ <&pinctrl1 15 0 10>,
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+ <&pinctrl2 25 0 0>;
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+ gpio-ranges-group-names = "",
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+ "foo",
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+ "",
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+ "bar";
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+ };
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+
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+Here, three GPIO ranges are defined wrt. two pin controllers. pinctrl1 GPIO
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+ranges are defined using pin numbers whereas the GPIO ranges wrt. pinctrl2
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+are named "foo" and "bar".
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