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@@ -67,15 +67,15 @@ unsigned int ipi_timer_latch[NR_CPUS];
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#define IPIBUF_PER_CPU 4
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-struct smtc_ipi_q IPIQ[NR_CPUS];
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-struct smtc_ipi_q freeIPIq;
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+static struct smtc_ipi_q IPIQ[NR_CPUS];
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+static struct smtc_ipi_q freeIPIq;
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/* Forward declarations */
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void ipi_decode(struct smtc_ipi *);
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-void post_direct_ipi(int cpu, struct smtc_ipi *pipi);
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-void setup_cross_vpe_interrupts(void);
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+static void post_direct_ipi(int cpu, struct smtc_ipi *pipi);
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+static void setup_cross_vpe_interrupts(void);
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void init_smtc_stats(void);
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/* Global SMTC Status */
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@@ -190,7 +190,7 @@ void __init sanitize_tlb_entries(void)
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* Configure shared TLB - VPC configuration bit must be set by caller
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*/
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-void smtc_configure_tlb(void)
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+static void smtc_configure_tlb(void)
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{
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int i,tlbsiz,vpes;
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unsigned long mvpconf0;
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@@ -638,7 +638,7 @@ int setup_irq_smtc(unsigned int irq, struct irqaction * new,
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* the VPE.
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*/
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-void smtc_ipi_qdump(void)
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+static void smtc_ipi_qdump(void)
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{
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int i;
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@@ -749,7 +749,7 @@ void smtc_send_ipi(int cpu, int type, unsigned int action)
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/*
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* Send IPI message to Halted TC, TargTC/TargVPE already having been set
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*/
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-void post_direct_ipi(int cpu, struct smtc_ipi *pipi)
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+static void post_direct_ipi(int cpu, struct smtc_ipi *pipi)
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{
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struct pt_regs *kstack;
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unsigned long tcstatus;
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@@ -968,7 +968,7 @@ static void ipi_irq_dispatch(void)
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static struct irqaction irq_ipi;
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-void setup_cross_vpe_interrupts(void)
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+static void setup_cross_vpe_interrupts(void)
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{
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if (!cpu_has_vint)
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panic("SMTC Kernel requires Vectored Interupt support");
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@@ -1264,7 +1264,7 @@ void smtc_flush_tlb_asid(unsigned long asid)
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* Support for single-threading cache flush operations.
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*/
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-int halt_state_save[NR_CPUS];
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+static int halt_state_save[NR_CPUS];
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/*
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* To really, really be sure that nothing is being done
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