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@@ -29,6 +29,8 @@
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#include <plat/control.h>
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#include <plat/control.h>
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#include <plat/serial.h>
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#include <plat/serial.h>
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+#include <asm/tlbflush.h>
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+
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#include "cm.h"
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#include "cm.h"
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#include "cm-regbits-34xx.h"
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#include "cm-regbits-34xx.h"
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#include "prm-regbits-34xx.h"
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#include "prm-regbits-34xx.h"
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@@ -164,6 +166,35 @@ static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id)
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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}
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}
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+static void restore_control_register(u32 val)
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+{
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+ __asm__ __volatile__ ("mcr p15, 0, %0, c1, c0, 0" : : "r" (val));
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+}
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+
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+/* Function to restore the table entry that was modified for enabling MMU */
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+static void restore_table_entry(void)
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+{
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+ u32 *scratchpad_address;
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+ u32 previous_value, control_reg_value;
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+ u32 *address;
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+
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+ scratchpad_address = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD);
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+
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+ /* Get address of entry that was modified */
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+ address = (u32 *)__raw_readl(scratchpad_address +
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+ OMAP343X_TABLE_ADDRESS_OFFSET);
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+ /* Get the previous value which needs to be restored */
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+ previous_value = __raw_readl(scratchpad_address +
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+ OMAP343X_TABLE_VALUE_OFFSET);
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+ address = __va(address);
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+ *address = previous_value;
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+ flush_tlb_all();
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+ control_reg_value = __raw_readl(scratchpad_address
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+ + OMAP343X_CONTROL_REG_VALUE_OFFSET);
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+ /* This will enable caches and prediction */
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+ restore_control_register(control_reg_value);
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+}
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+
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static void omap_sram_idle(void)
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static void omap_sram_idle(void)
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{
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{
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/* Variable to tell what needs to be saved and restored
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/* Variable to tell what needs to be saved and restored
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@@ -220,6 +251,10 @@ static void omap_sram_idle(void)
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_omap_sram_idle(NULL, save_state);
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_omap_sram_idle(NULL, save_state);
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cpu_init();
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cpu_init();
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+ /* Restore table entry modified during MMU restoration */
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+ if (pwrdm_read_prev_pwrst(mpu_pwrdm) == PWRDM_POWER_OFF)
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+ restore_table_entry();
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+
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if (core_next_state < PWRDM_POWER_ON) {
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if (core_next_state < PWRDM_POWER_ON) {
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if (per_next_state < PWRDM_POWER_ON)
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if (per_next_state < PWRDM_POWER_ON)
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omap_uart_resume_idle(2);
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omap_uart_resume_idle(2);
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