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@@ -1,18 +1,13 @@
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-/* linux/include/asm-arm/arch-bast/dma.h
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+/* linux/include/asm-arm/arch-s3c2410/dma.h
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*
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- * Copyright (C) 2003,2004 Simtec Electronics
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+ * Copyright (C) 2003,2004,2006 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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- * Samsung S3C2410X DMA support
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+ * Samsung S3C241XX DMA support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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- *
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- * Changelog:
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- * ??-May-2003 BJD Created file
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- * ??-Jun-2003 BJD Added more dma functionality to go with arch
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- * 10-Nov-2004 BJD Added sys_device support
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*/
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#ifndef __ASM_ARCH_DMA_H
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@@ -21,15 +16,13 @@
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#include <linux/sysdev.h>
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#include "hardware.h"
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-
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/*
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* This is the maximum DMA address(physical address) that can be DMAd to.
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*
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*/
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-#define MAX_DMA_ADDRESS 0x20000000
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+#define MAX_DMA_ADDRESS 0x40000000
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#define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */
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-
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/* we have 4 dma channels */
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#define S3C2410_DMA_CHANNELS (4)
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@@ -83,10 +76,9 @@ enum s3c2410_dma_buffresult {
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S3C2410_RES_ABORT
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};
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-
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enum s3c2410_dmasrc {
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- S3C2410_DMASRC_HW, /* source is memory */
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- S3C2410_DMASRC_MEM /* source is hardware */
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+ S3C2410_DMASRC_HW, /* source is memory */
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+ S3C2410_DMASRC_MEM /* source is hardware */
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};
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/* enum s3c2410_chan_op
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@@ -101,7 +93,7 @@ enum s3c2410_chan_op {
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S3C2410_DMAOP_PAUSE,
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S3C2410_DMAOP_RESUME,
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S3C2410_DMAOP_FLUSH,
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- S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */
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+ S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */
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S3C2410_DMAOP_STARTED, /* indicate channel started */
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};
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@@ -125,12 +117,12 @@ struct s3c2410_dma_client {
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struct s3c2410_dma_buf;
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struct s3c2410_dma_buf {
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- struct s3c2410_dma_buf *next;
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- int magic; /* magic */
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- int size; /* buffer size in bytes */
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- dma_addr_t data; /* start of DMA data */
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- dma_addr_t ptr; /* where the DMA got to [1] */
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- void *id; /* client's id */
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+ struct s3c2410_dma_buf *next;
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+ int magic; /* magic */
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+ int size; /* buffer size in bytes */
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+ dma_addr_t data; /* start of DMA data */
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+ dma_addr_t ptr; /* where the DMA got to [1] */
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+ void *id; /* client's id */
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};
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/* [1] is this updated for both recv/send modes? */
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@@ -150,11 +142,11 @@ typedef int (*s3c2410_dma_opfn_t)(struct s3c2410_dma_chan *,
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enum s3c2410_chan_op );
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struct s3c2410_dma_stats {
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- unsigned long loads;
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- unsigned long timeout_longest;
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- unsigned long timeout_shortest;
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- unsigned long timeout_avg;
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- unsigned long timeout_failed;
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+ unsigned long loads;
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+ unsigned long timeout_longest;
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+ unsigned long timeout_shortest;
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+ unsigned long timeout_avg;
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+ unsigned long timeout_failed;
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};
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/* struct s3c2410_dma_chan
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@@ -164,42 +156,42 @@ struct s3c2410_dma_stats {
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struct s3c2410_dma_chan {
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/* channel state flags and information */
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- unsigned char number; /* number of this dma channel */
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- unsigned char in_use; /* channel allocated */
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- unsigned char irq_claimed; /* irq claimed for channel */
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- unsigned char irq_enabled; /* irq enabled for channel */
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- unsigned char xfer_unit; /* size of an transfer */
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+ unsigned char number; /* number of this dma channel */
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+ unsigned char in_use; /* channel allocated */
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+ unsigned char irq_claimed; /* irq claimed for channel */
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+ unsigned char irq_enabled; /* irq enabled for channel */
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+ unsigned char xfer_unit; /* size of an transfer */
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/* channel state */
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- enum s3c2410_dma_state state;
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- enum s3c2410_dma_loadst load_state;
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- struct s3c2410_dma_client *client;
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+ enum s3c2410_dma_state state;
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+ enum s3c2410_dma_loadst load_state;
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+ struct s3c2410_dma_client *client;
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/* channel configuration */
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- enum s3c2410_dmasrc source;
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- unsigned long dev_addr;
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- unsigned long load_timeout;
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- unsigned int flags; /* channel flags */
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+ enum s3c2410_dmasrc source;
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+ unsigned long dev_addr;
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+ unsigned long load_timeout;
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+ unsigned int flags; /* channel flags */
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/* channel's hardware position and configuration */
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- void __iomem *regs; /* channels registers */
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- void __iomem *addr_reg; /* data address register */
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- unsigned int irq; /* channel irq */
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- unsigned long dcon; /* default value of DCON */
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+ void __iomem *regs; /* channels registers */
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+ void __iomem *addr_reg; /* data address register */
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+ unsigned int irq; /* channel irq */
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+ unsigned long dcon; /* default value of DCON */
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/* driver handles */
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- s3c2410_dma_cbfn_t callback_fn; /* buffer done callback */
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- s3c2410_dma_opfn_t op_fn; /* channel operation callback */
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+ s3c2410_dma_cbfn_t callback_fn; /* buffer done callback */
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+ s3c2410_dma_opfn_t op_fn; /* channel op callback */
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/* stats gathering */
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- struct s3c2410_dma_stats *stats;
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- struct s3c2410_dma_stats stats_store;
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+ struct s3c2410_dma_stats *stats;
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+ struct s3c2410_dma_stats stats_store;
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/* buffer list and information */
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- struct s3c2410_dma_buf *curr; /* current dma buffer */
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- struct s3c2410_dma_buf *next; /* next buffer to load */
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- struct s3c2410_dma_buf *end; /* end of queue */
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+ struct s3c2410_dma_buf *curr; /* current dma buffer */
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+ struct s3c2410_dma_buf *next; /* next buffer to load */
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+ struct s3c2410_dma_buf *end; /* end of queue */
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/* system device */
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struct sys_device dev;
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